[llvm-branch-commits] [llvm] [AMDGPU][NFC] Extract SIAtomicAddrSpace and fence MMRA parsing from SIMemoryLegalizer (PR #231854)

Fabian Ritter via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Wed Oct 14 05:18:08 PDT 2026


================
@@ -113,6 +118,46 @@ bool isReallyAClobber(const Value *Ptr, MemoryDef *Def, AAResults *AA);
 bool isClobberedInFunction(const LoadInst *Load, MemorySSA *MSSA,
                            AAResults *AA);
 
+/// The distinct address spaces supported by the AMDGPU target for
----------------
ritter-x2a wrote:

It's also not really referring to address spaces in the LLVM sense, and more to memory apertures/regions. FLAT is a separate address space, but here its just the union of the global, LDS and scratch memory regions/apertures. Maybe `SIMemoryApertureSet` (or `AMDGPU::MemoryApertureSet`) would be a more accurate name? (Changing its name will of course come with a bigger diff in `SIMemoryLegalizer`.)

https://github.com/llvm/llvm-project/pull/231854


More information about the llvm-branch-commits mailing list