[llvm-branch-commits] [llvm] [LoongArch] Perform DAG combine for MUL to generate `[x]vmulw{ev/od}` (PR #161368)
via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Wed Oct 14 02:49:05 PDT 2026
https://github.com/zhaoqi5 updated https://github.com/llvm/llvm-project/pull/161368
>From 07c682be3914272eea737fd8621ba2e23d9950c0 Mon Sep 17 00:00:00 2001
From: Qi Zhao <zhaoqi01 at loongson.cn>
Date: Tue, 30 Sep 2025 20:53:06 +0800
Subject: [PATCH 1/3] [LoongArch] Perform DAG combine for MUL to generate
`[x]vmulw{ev/od}`
---
.../LoongArch/LoongArchISelLowering.cpp | 113 ++
.../LoongArch/LoongArchLASXInstrInfo.td | 41 +
.../Target/LoongArch/LoongArchLSXInstrInfo.td | 50 +
.../lasx/ir-instruction/mulwev_od.ll | 1040 +----------------
.../LoongArch/lsx/ir-instruction/mulwev_od.ll | 204 +---
5 files changed, 271 insertions(+), 1177 deletions(-)
diff --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
index 1d01e76a5ebd2..97bda538e061f 100644
--- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
@@ -537,6 +537,7 @@ LoongArchTargetLowering::LoongArchTargetLowering(const TargetMachine &TM,
setTargetDAGCombine(ISD::UINT_TO_FP);
setTargetDAGCombine(ISD::ZERO_EXTEND);
setTargetDAGCombine(ISD::SIGN_EXTEND);
+ setTargetDAGCombine(ISD::MUL);
}
// Set DAG combine for 'LASX' feature.
@@ -8898,6 +8899,115 @@ static SDValue performVSELECTCombine(SDNode *N, SelectionDAG &DAG,
DL, VT, X, Shift);
}
+static SDValue performMULCombine(SDNode *N, SelectionDAG &DAG,
+ TargetLowering::DAGCombinerInfo &DCI) {
+ if (!DCI.isBeforeLegalize())
+ return SDValue();
+
+ SDLoc DL(N);
+ EVT ResTy = N->getValueType(0);
+ SDValue N0 = N->getOperand(0);
+ SDValue N1 = N->getOperand(1);
+
+ if (ResTy != MVT::v8i16 && ResTy != MVT::v4i32 && ResTy != MVT::v2i64 &&
+ ResTy != MVT::v16i16 && ResTy != MVT::v8i32 &&
+ ResTy != MVT::v4i64) // && ResTy != MVT::v2i128)
+ return SDValue();
+
+ // Combine:
+ // ti,tii,...,tx = extract_vector_elt t0, {0,2,4,.../1,3,5,...}
+ // tj,tjj,...,ty = extract_vector_elt t1, {0,2,4,.../1,3,5,...}
+ // tm = BUILD_VECTOR ti,tii,...,tx
+ // tn = BUILD_VECTOR tj,tjj,...,ty
+ // ta = {sign/zero}_extend tm
+ // tb = {sign/zero}_extend tn
+ // tr = mul ta, tb
+ // to:
+ // tr = VMULW{EV/OD}[U/US] t0, t1
+ auto getExtType = [](unsigned Op0, unsigned Op1) -> unsigned {
+ if (Op0 == ISD::SIGN_EXTEND && Op1 == ISD::SIGN_EXTEND)
+ return 0;
+ if (Op0 == ISD::ZERO_EXTEND && Op1 == ISD::ZERO_EXTEND)
+ return 1;
+ if (Op0 == ISD::ZERO_EXTEND && Op1 == ISD::SIGN_EXTEND)
+ return 2;
+ if (Op0 == ISD::SIGN_EXTEND && Op1 == ISD::ZERO_EXTEND)
+ return 3;
+ return -1;
+ };
+
+ unsigned ExtType = getExtType(N0.getOpcode(), N1.getOpcode());
+ if (ExtType < 0)
+ return SDValue();
+
+ SDValue BV0 = N0.getOperand(0);
+ SDValue BV1 = N1.getOperand(0);
+ if (BV0.getOpcode() != ISD::BUILD_VECTOR ||
+ BV1.getOpcode() != ISD::BUILD_VECTOR)
+ return SDValue();
+
+ unsigned ResBits = ResTy.getScalarType().getSizeInBits();
+ unsigned BV0Bits = BV0.getValueType().getScalarType().getSizeInBits();
+ unsigned BV1Bits = BV1.getValueType().getScalarType().getSizeInBits();
+ if (BV0Bits != BV1Bits || ResBits != BV0Bits * 2)
+ return SDValue();
+
+ unsigned Index;
+ SDValue OrigN0, OrigN1;
+ for (unsigned i = 0; i < BV0.getNumOperands(); ++i) {
+ SDValue Op0 = BV0.getOperand(i);
+ SDValue Op1 = BV1.getOperand(i);
+ // Each element of BUILD_VECTOR must be EXTRACT_VECTOR_ELT.
+ if (Op0.getOpcode() != ISD::EXTRACT_VECTOR_ELT ||
+ Op1.getOpcode() != ISD::EXTRACT_VECTOR_ELT)
+ return SDValue();
+
+ // Check each EXTRACT_VECTOR_ELT's source vector and index.
+ if (Op0.getOperand(1) != Op1.getOperand(1))
+ return SDValue();
+
+ auto *IdxC = dyn_cast<ConstantSDNode>(Op0.getOperand(1));
+ if (!IdxC)
+ return SDValue();
+ unsigned CurIdx = IdxC->getZExtValue();
+
+ if (i == 0) {
+ if (CurIdx != 0 && CurIdx != 1)
+ return SDValue();
+ OrigN0 = Op0.getOperand(0);
+ OrigN1 = Op1.getOperand(0);
+ } else {
+ if (CurIdx != Index + 2)
+ return SDValue();
+ if (Op0.getOperand(0) != OrigN0 || Op1.getOperand(0) != OrigN1)
+ return SDValue();
+ }
+ Index = CurIdx;
+ }
+
+ if (OrigN0.getValueType() != OrigN1.getValueType())
+ return SDValue();
+ if (OrigN0.getValueType().getVectorNumElements() !=
+ ResTy.getVectorNumElements() * 2)
+ return SDValue();
+
+ SDValue Result;
+ EVT OrigTy = OrigN0.getValueType();
+ bool IsEven = (Index % 2 == 0);
+
+ static const unsigned OpcTable[3][2] = {
+ {LoongArchISD::VMULWOD, LoongArchISD::VMULWEV},
+ {LoongArchISD::VMULWODU, LoongArchISD::VMULWEVU},
+ {LoongArchISD::VMULWODUS, LoongArchISD::VMULWEVUS}};
+
+ if (ExtType == 3)
+ Result = DAG.getNode(OpcTable[2][IsEven], DL, OrigTy, OrigN1, OrigN0);
+ else
+ Result = DAG.getNode(OpcTable[ExtType][IsEven], DL, OrigTy, OrigN0, OrigN1);
+
+ return DAG.getBitcast(ResTy, Result);
+}
+
SDValue LoongArchTargetLowering::PerformDAGCombine(SDNode *N,
DAGCombinerInfo &DCI) const {
SelectionDAG &DAG = DCI.DAG;
@@ -8965,6 +9075,9 @@ SDValue LoongArchTargetLowering::PerformDAGCombine(SDNode *N,
if (SDValue Result =
combineFP_ROUND(SDValue(N, 0), SDLoc(N), DAG, Subtarget))
return Result;
+ break;
+ case ISD::MUL:
+ return performMULCombine(N, DAG, DCI);
}
return SDValue();
}
diff --git a/llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td b/llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
index fcd134770332d..46c6f4c54a85e 100644
--- a/llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
+++ b/llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
@@ -1392,6 +1392,39 @@ multiclass PairInsertExtractPatV4<ValueType vecty, ValueType elemty> {
}
}
+multiclass XVmulwPat<SDPatternOperator OpNode, string Inst> {
+ def : Pat<(OpNode (v32i8 LASX256:$xj), (v32i8 LASX256:$xk)),
+ (!cast<LAInst>(Inst#"_H_B") LASX256:$xj, LASX256:$xk)>;
+ def : Pat<(OpNode (v16i16 LASX256:$xj), (v16i16 LASX256:$xk)),
+ (!cast<LAInst>(Inst#"_W_H") LASX256:$xj, LASX256:$xk)>;
+ def : Pat<(OpNode (v8i32 LASX256:$xj), (v8i32 LASX256:$xk)),
+ (!cast<LAInst>(Inst#"_D_W") LASX256:$xj, LASX256:$xk)>;
+ def : Pat<(OpNode (v4i64 LASX256:$xj), (v4i64 LASX256:$xk)),
+ (!cast<LAInst>(Inst#"_Q_D") LASX256:$xj, LASX256:$xk)>;
+}
+
+multiclass XVmulwuPat<SDPatternOperator OpNode, string Inst> {
+ def : Pat<(OpNode (v32i8 LASX256:$xj), (v32i8 LASX256:$xk)),
+ (!cast<LAInst>(Inst#"_H_BU") LASX256:$xj, LASX256:$xk)>;
+ def : Pat<(OpNode (v16i16 LASX256:$xj), (v16i16 LASX256:$xk)),
+ (!cast<LAInst>(Inst#"_W_HU") LASX256:$xj, LASX256:$xk)>;
+ def : Pat<(OpNode (v8i32 LASX256:$xj), (v8i32 LASX256:$xk)),
+ (!cast<LAInst>(Inst#"_D_WU") LASX256:$xj, LASX256:$xk)>;
+ def : Pat<(OpNode (v4i64 LASX256:$xj), (v4i64 LASX256:$xk)),
+ (!cast<LAInst>(Inst#"_Q_DU") LASX256:$xj, LASX256:$xk)>;
+}
+
+multiclass XVmulwusPat<SDPatternOperator OpNode, string Inst> {
+ def : Pat<(OpNode (v32i8 LASX256:$xj), (v32i8 LASX256:$xk)),
+ (!cast<LAInst>(Inst#"_H_BU_B") LASX256:$xj, LASX256:$xk)>;
+ def : Pat<(OpNode (v16i16 LASX256:$xj), (v16i16 LASX256:$xk)),
+ (!cast<LAInst>(Inst#"_W_HU_H") LASX256:$xj, LASX256:$xk)>;
+ def : Pat<(OpNode (v8i32 LASX256:$xj), (v8i32 LASX256:$xk)),
+ (!cast<LAInst>(Inst#"_D_WU_W") LASX256:$xj, LASX256:$xk)>;
+ def : Pat<(OpNode (v4i64 LASX256:$xj), (v4i64 LASX256:$xk)),
+ (!cast<LAInst>(Inst#"_Q_DU_D") LASX256:$xj, LASX256:$xk)>;
+}
+
let Predicates = [HasExtLASX] in {
// XVADD_{B/H/W/D}
@@ -1431,6 +1464,14 @@ defm : PatXrXr<mul, "XVMUL">;
defm : PatXrXr<mulhs, "XVMUH">;
defm : PatXrXrU<mulhu, "XVMUH">;
+// XVMULW{EV/OD}_{H_B/W_H/D_W/Q_D}[U], XVMULW{EV/OD}_{H_BU_B/W_HU_H/D_WU_W/Q_DU_D}
+defm : XVmulwPat<loongarch_vmulwev, "XVMULWEV">;
+defm : XVmulwPat<loongarch_vmulwod, "XVMULWOD">;
+defm : XVmulwuPat<loongarch_vmulwevu, "XVMULWEV">;
+defm : XVmulwuPat<loongarch_vmulwodu, "XVMULWOD">;
+defm : XVmulwusPat<loongarch_vmulwevus, "XVMULWEV">;
+defm : XVmulwusPat<loongarch_vmulwodus, "XVMULWOD">;
+
// XVMADD_{B/H/W/D}
defm : PatXrXrXr<muladd, "XVMADD">;
// XVMSUB_{B/H/W/D}
diff --git a/llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td b/llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
index e1489f9e36d69..e3f0bea2d684a 100644
--- a/llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
+++ b/llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
@@ -139,6 +139,15 @@ def loongarch_vanynonzero
def loongarch_vallzero
: SDNode<"LoongArchISD::VALLZERO", SDT_LoongArchVMSKCOND>;
+// Perform element-wise vector multiplication at even/odd indices,
+// and keep each result in its corresponding widened slot
+def loongarch_vmulwev: SDNode<"LoongArchISD::VMULWEV", SDT_LoongArchV2R>;
+def loongarch_vmulwod: SDNode<"LoongArchISD::VMULWOD", SDT_LoongArchV2R>;
+def loongarch_vmulwevu: SDNode<"LoongArchISD::VMULWEVU", SDT_LoongArchV2R>;
+def loongarch_vmulwodu: SDNode<"LoongArchISD::VMULWODU", SDT_LoongArchV2R>;
+def loongarch_vmulwevus: SDNode<"LoongArchISD::VMULWEVUS", SDT_LoongArchV2R>;
+def loongarch_vmulwodus: SDNode<"LoongArchISD::VMULWODUS", SDT_LoongArchV2R>;
+
def immZExt1 : ImmLeaf<GRLenVT, [{return isUInt<1>(Imm);}]>;
def immZExt2 : ImmLeaf<GRLenVT, [{return isUInt<2>(Imm);}]>;
def immZExt3 : ImmLeaf<GRLenVT, [{return isUInt<3>(Imm);}]>;
@@ -1668,6 +1677,39 @@ multiclass InsertExtractPatV2<ValueType vecty, ValueType elemty> {
}
}
+multiclass VmulwPat<SDPatternOperator OpNode, string Inst> {
+ def : Pat<(OpNode (v16i8 LSX128:$vj), (v16i8 LSX128:$vk)),
+ (!cast<LAInst>(Inst#"_H_B") LSX128:$vj, LSX128:$vk)>;
+ def : Pat<(OpNode (v8i16 LSX128:$vj), (v8i16 LSX128:$vk)),
+ (!cast<LAInst>(Inst#"_W_H") LSX128:$vj, LSX128:$vk)>;
+ def : Pat<(OpNode (v4i32 LSX128:$vj), (v4i32 LSX128:$vk)),
+ (!cast<LAInst>(Inst#"_D_W") LSX128:$vj, LSX128:$vk)>;
+ def : Pat<(OpNode (v2i64 LSX128:$vj), (v2i64 LSX128:$vk)),
+ (!cast<LAInst>(Inst#"_Q_D") LSX128:$vj, LSX128:$vk)>;
+}
+
+multiclass VmulwuPat<SDPatternOperator OpNode, string Inst> {
+ def : Pat<(OpNode (v16i8 LSX128:$vj), (v16i8 LSX128:$vk)),
+ (!cast<LAInst>(Inst#"_H_BU") LSX128:$vj, LSX128:$vk)>;
+ def : Pat<(OpNode (v8i16 LSX128:$vj), (v8i16 LSX128:$vk)),
+ (!cast<LAInst>(Inst#"_W_HU") LSX128:$vj, LSX128:$vk)>;
+ def : Pat<(OpNode (v4i32 LSX128:$vj), (v4i32 LSX128:$vk)),
+ (!cast<LAInst>(Inst#"_D_WU") LSX128:$vj, LSX128:$vk)>;
+ def : Pat<(OpNode (v2i64 LSX128:$vj), (v2i64 LSX128:$vk)),
+ (!cast<LAInst>(Inst#"_Q_DU") LSX128:$vj, LSX128:$vk)>;
+}
+
+multiclass VmulwusPat<SDPatternOperator OpNode, string Inst> {
+ def : Pat<(OpNode (v16i8 LSX128:$vj), (v16i8 LSX128:$vk)),
+ (!cast<LAInst>(Inst#"_H_BU_B") LSX128:$vj, LSX128:$vk)>;
+ def : Pat<(OpNode (v8i16 LSX128:$vj), (v8i16 LSX128:$vk)),
+ (!cast<LAInst>(Inst#"_W_HU_H") LSX128:$vj, LSX128:$vk)>;
+ def : Pat<(OpNode (v4i32 LSX128:$vj), (v4i32 LSX128:$vk)),
+ (!cast<LAInst>(Inst#"_D_WU_W") LSX128:$vj, LSX128:$vk)>;
+ def : Pat<(OpNode (v2i64 LSX128:$vj), (v2i64 LSX128:$vk)),
+ (!cast<LAInst>(Inst#"_Q_DU_D") LSX128:$vj, LSX128:$vk)>;
+}
+
let Predicates = [HasExtLSX] in {
// VADD_{B/H/W/D}
@@ -1707,6 +1749,14 @@ defm : PatVrVr<mul, "VMUL">;
defm : PatVrVr<mulhs, "VMUH">;
defm : PatVrVrU<mulhu, "VMUH">;
+// VMULW{EV/OD}_{H_B/W_H/D_W/Q_D}[U], VMULW{EV/OD}_{H_BU_B/W_HU_H/D_WU_W/Q_DU_D}
+defm : VmulwPat<loongarch_vmulwev, "VMULWEV">;
+defm : VmulwPat<loongarch_vmulwod, "VMULWOD">;
+defm : VmulwuPat<loongarch_vmulwevu, "VMULWEV">;
+defm : VmulwuPat<loongarch_vmulwodu, "VMULWOD">;
+defm : VmulwusPat<loongarch_vmulwevus, "VMULWEV">;
+defm : VmulwusPat<loongarch_vmulwodus, "VMULWOD">;
+
// VMADD_{B/H/W/D}
defm : PatVrVrVr<muladd, "VMADD">;
// VMSUB_{B/H/W/D}
diff --git a/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/mulwev_od.ll b/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/mulwev_od.ll
index 2b8ca39bff385..605325f4dc4f4 100644
--- a/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/mulwev_od.ll
+++ b/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/mulwev_od.ll
@@ -5,77 +5,9 @@
define void @vmulwev_h_b(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK-LABEL: vmulwev_h_b:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: xvld $xr2, $a1, 0
+; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 0
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 0
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 2
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 1
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 4
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 2
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 6
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 3
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 8
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 4
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 10
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 5
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 12
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 6
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 14
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 7
-; CHECK-NEXT: xvpermi.d $xr2, $xr2, 14
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 0
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 8
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 2
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 9
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 4
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 10
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 6
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 11
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 8
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 12
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 10
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 13
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 12
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 14
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 14
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 15
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 0
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 0
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 2
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 1
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 4
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 2
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 6
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 3
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 8
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 4
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 10
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 5
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 12
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 6
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 14
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 7
-; CHECK-NEXT: xvpermi.d $xr1, $xr1, 14
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 0
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 8
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 2
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 9
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 4
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 10
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 6
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 11
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 8
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 12
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 10
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 13
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 12
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 14
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 14
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 15
-; CHECK-NEXT: vext2xv.h.b $xr0, $xr0
-; CHECK-NEXT: vext2xv.h.b $xr1, $xr2
-; CHECK-NEXT: xvmul.h $xr0, $xr0, $xr1
+; CHECK-NEXT: xvmulwev.h.b $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -95,43 +27,7 @@ define void @vmulwev_w_h(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 0
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 0
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 2
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 1
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 4
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 2
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 6
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 3
-; CHECK-NEXT: xvpermi.d $xr0, $xr0, 14
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 0
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 4
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 2
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 5
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 4
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 6
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 6
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 7
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 0
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 0
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 2
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 1
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 4
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 2
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 6
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 3
-; CHECK-NEXT: xvpermi.d $xr1, $xr1, 14
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 0
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 4
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 2
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 5
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 4
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 6
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 6
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 7
-; CHECK-NEXT: vext2xv.w.h $xr1, $xr2
-; CHECK-NEXT: vext2xv.w.h $xr0, $xr0
-; CHECK-NEXT: xvmul.w $xr0, $xr1, $xr0
+; CHECK-NEXT: xvmulwev.w.h $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -151,25 +47,7 @@ define void @vmulwev_d_w(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr0, 0
-; CHECK-NEXT: vinsgr2vr.w $vr2, $a1, 0
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr0, 2
-; CHECK-NEXT: vinsgr2vr.w $vr2, $a1, 1
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr0, 4
-; CHECK-NEXT: vinsgr2vr.w $vr2, $a1, 2
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr0, 6
-; CHECK-NEXT: vinsgr2vr.w $vr2, $a1, 3
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr1, 0
-; CHECK-NEXT: vinsgr2vr.w $vr0, $a1, 0
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr1, 2
-; CHECK-NEXT: vinsgr2vr.w $vr0, $a1, 1
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr1, 4
-; CHECK-NEXT: vinsgr2vr.w $vr0, $a1, 2
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr1, 6
-; CHECK-NEXT: vinsgr2vr.w $vr0, $a1, 3
-; CHECK-NEXT: vext2xv.d.w $xr1, $xr2
-; CHECK-NEXT: vext2xv.d.w $xr0, $xr0
-; CHECK-NEXT: xvmul.d $xr0, $xr1, $xr0
+; CHECK-NEXT: xvmulwev.d.w $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -333,77 +211,9 @@ entry:
define void @vmulwod_h_b(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK-LABEL: vmulwod_h_b:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: xvld $xr2, $a1, 0
+; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 1
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 0
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 3
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 1
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 5
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 2
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 7
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 3
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 9
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 4
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 11
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 5
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 13
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 6
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 15
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 7
-; CHECK-NEXT: xvpermi.d $xr2, $xr2, 14
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 1
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 8
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 3
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 9
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 5
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 10
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 7
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 11
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 9
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 12
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 11
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 13
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 13
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 14
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 15
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 15
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 1
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 0
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 3
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 1
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 5
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 2
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 7
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 3
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 9
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 4
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 11
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 5
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 13
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 6
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 15
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 7
-; CHECK-NEXT: xvpermi.d $xr1, $xr1, 14
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 1
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 8
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 3
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 9
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 5
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 10
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 7
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 11
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 9
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 12
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 11
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 13
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 13
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 14
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 15
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 15
-; CHECK-NEXT: vext2xv.h.b $xr0, $xr0
-; CHECK-NEXT: vext2xv.h.b $xr1, $xr2
-; CHECK-NEXT: xvmul.h $xr0, $xr0, $xr1
+; CHECK-NEXT: xvmulwod.h.b $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -423,43 +233,7 @@ define void @vmulwod_w_h(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 1
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 0
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 3
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 1
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 5
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 2
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 7
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 3
-; CHECK-NEXT: xvpermi.d $xr0, $xr0, 14
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 1
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 4
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 3
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 5
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 5
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 6
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 7
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 7
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 1
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 0
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 3
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 1
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 5
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 2
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 7
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 3
-; CHECK-NEXT: xvpermi.d $xr1, $xr1, 14
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 1
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 4
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 3
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 5
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 5
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 6
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 7
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 7
-; CHECK-NEXT: vext2xv.w.h $xr1, $xr2
-; CHECK-NEXT: vext2xv.w.h $xr0, $xr0
-; CHECK-NEXT: xvmul.w $xr0, $xr1, $xr0
+; CHECK-NEXT: xvmulwod.w.h $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -479,25 +253,7 @@ define void @vmulwod_d_w(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr0, 1
-; CHECK-NEXT: vinsgr2vr.w $vr2, $a1, 0
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr0, 3
-; CHECK-NEXT: vinsgr2vr.w $vr2, $a1, 1
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr0, 5
-; CHECK-NEXT: vinsgr2vr.w $vr2, $a1, 2
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr0, 7
-; CHECK-NEXT: vinsgr2vr.w $vr2, $a1, 3
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr1, 1
-; CHECK-NEXT: vinsgr2vr.w $vr0, $a1, 0
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr1, 3
-; CHECK-NEXT: vinsgr2vr.w $vr0, $a1, 1
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr1, 5
-; CHECK-NEXT: vinsgr2vr.w $vr0, $a1, 2
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr1, 7
-; CHECK-NEXT: vinsgr2vr.w $vr0, $a1, 3
-; CHECK-NEXT: vext2xv.d.w $xr1, $xr2
-; CHECK-NEXT: vext2xv.d.w $xr0, $xr0
-; CHECK-NEXT: xvmul.d $xr0, $xr1, $xr0
+; CHECK-NEXT: xvmulwod.d.w $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -661,77 +417,9 @@ entry:
define void @vmulwev_h_bu(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK-LABEL: vmulwev_h_bu:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: xvld $xr2, $a1, 0
+; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 0
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 0
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 2
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 1
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 4
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 2
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 6
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 3
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 8
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 4
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 10
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 5
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 12
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 6
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 14
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 7
-; CHECK-NEXT: xvpermi.d $xr2, $xr2, 14
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 0
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 8
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 2
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 9
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 4
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 10
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 6
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 11
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 8
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 12
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 10
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 13
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 12
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 14
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 14
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 15
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 0
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 0
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 2
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 1
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 4
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 2
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 6
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 3
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 8
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 4
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 10
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 5
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 12
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 6
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 14
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 7
-; CHECK-NEXT: xvpermi.d $xr1, $xr1, 14
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 0
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 8
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 2
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 9
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 4
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 10
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 6
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 11
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 8
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 12
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 10
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 13
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 12
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 14
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 14
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 15
-; CHECK-NEXT: vext2xv.hu.bu $xr0, $xr0
-; CHECK-NEXT: vext2xv.hu.bu $xr1, $xr2
-; CHECK-NEXT: xvmul.h $xr0, $xr0, $xr1
+; CHECK-NEXT: xvmulwev.h.bu $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -751,43 +439,7 @@ define void @vmulwev_w_hu(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 0
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 0
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 2
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 1
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 4
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 2
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 6
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 3
-; CHECK-NEXT: xvpermi.d $xr0, $xr0, 14
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 0
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 4
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 2
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 5
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 4
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 6
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 6
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 7
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 0
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 0
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 2
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 1
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 4
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 2
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 6
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 3
-; CHECK-NEXT: xvpermi.d $xr1, $xr1, 14
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 0
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 4
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 2
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 5
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 4
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 6
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 6
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 7
-; CHECK-NEXT: vext2xv.wu.hu $xr1, $xr2
-; CHECK-NEXT: vext2xv.wu.hu $xr0, $xr0
-; CHECK-NEXT: xvmul.w $xr0, $xr1, $xr0
+; CHECK-NEXT: xvmulwev.w.hu $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -807,25 +459,7 @@ define void @vmulwev_d_wu(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr0, 0
-; CHECK-NEXT: vinsgr2vr.w $vr2, $a1, 0
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr0, 2
-; CHECK-NEXT: vinsgr2vr.w $vr2, $a1, 1
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr0, 4
-; CHECK-NEXT: vinsgr2vr.w $vr2, $a1, 2
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr0, 6
-; CHECK-NEXT: vinsgr2vr.w $vr2, $a1, 3
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr1, 0
-; CHECK-NEXT: vinsgr2vr.w $vr0, $a1, 0
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr1, 2
-; CHECK-NEXT: vinsgr2vr.w $vr0, $a1, 1
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr1, 4
-; CHECK-NEXT: vinsgr2vr.w $vr0, $a1, 2
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr1, 6
-; CHECK-NEXT: vinsgr2vr.w $vr0, $a1, 3
-; CHECK-NEXT: vext2xv.du.wu $xr1, $xr2
-; CHECK-NEXT: vext2xv.du.wu $xr0, $xr0
-; CHECK-NEXT: xvmul.d $xr0, $xr1, $xr0
+; CHECK-NEXT: xvmulwev.d.wu $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -935,77 +569,9 @@ entry:
define void @vmulwod_h_bu(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK-LABEL: vmulwod_h_bu:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: xvld $xr2, $a1, 0
+; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 1
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 0
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 3
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 1
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 5
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 2
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 7
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 3
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 9
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 4
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 11
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 5
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 13
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 6
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 15
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 7
-; CHECK-NEXT: xvpermi.d $xr2, $xr2, 14
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 1
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 8
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 3
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 9
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 5
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 10
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 7
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 11
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 9
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 12
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 11
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 13
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 13
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 14
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 15
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 15
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 1
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 0
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 3
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 1
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 5
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 2
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 7
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 3
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 9
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 4
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 11
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 5
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 13
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 6
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 15
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 7
-; CHECK-NEXT: xvpermi.d $xr1, $xr1, 14
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 1
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 8
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 3
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 9
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 5
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 10
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 7
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 11
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 9
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 12
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 11
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 13
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 13
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 14
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 15
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 15
-; CHECK-NEXT: vext2xv.hu.bu $xr0, $xr0
-; CHECK-NEXT: vext2xv.hu.bu $xr1, $xr2
-; CHECK-NEXT: xvmul.h $xr0, $xr0, $xr1
+; CHECK-NEXT: xvmulwod.h.bu $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -1025,43 +591,7 @@ define void @vmulwod_w_hu(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 1
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 0
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 3
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 1
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 5
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 2
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 7
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 3
-; CHECK-NEXT: xvpermi.d $xr0, $xr0, 14
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 1
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 4
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 3
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 5
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 5
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 6
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 7
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 7
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 1
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 0
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 3
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 1
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 5
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 2
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 7
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 3
-; CHECK-NEXT: xvpermi.d $xr1, $xr1, 14
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 1
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 4
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 3
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 5
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 5
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 6
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 7
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 7
-; CHECK-NEXT: vext2xv.wu.hu $xr1, $xr2
-; CHECK-NEXT: vext2xv.wu.hu $xr0, $xr0
-; CHECK-NEXT: xvmul.w $xr0, $xr1, $xr0
+; CHECK-NEXT: xvmulwod.w.hu $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -1081,25 +611,7 @@ define void @vmulwod_d_wu(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr0, 1
-; CHECK-NEXT: vinsgr2vr.w $vr2, $a1, 0
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr0, 3
-; CHECK-NEXT: vinsgr2vr.w $vr2, $a1, 1
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr0, 5
-; CHECK-NEXT: vinsgr2vr.w $vr2, $a1, 2
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr0, 7
-; CHECK-NEXT: vinsgr2vr.w $vr2, $a1, 3
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr1, 1
-; CHECK-NEXT: vinsgr2vr.w $vr0, $a1, 0
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr1, 3
-; CHECK-NEXT: vinsgr2vr.w $vr0, $a1, 1
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr1, 5
-; CHECK-NEXT: vinsgr2vr.w $vr0, $a1, 2
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr1, 7
-; CHECK-NEXT: vinsgr2vr.w $vr0, $a1, 3
-; CHECK-NEXT: vext2xv.du.wu $xr1, $xr2
-; CHECK-NEXT: vext2xv.du.wu $xr0, $xr0
-; CHECK-NEXT: xvmul.d $xr0, $xr1, $xr0
+; CHECK-NEXT: xvmulwod.d.wu $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -1209,77 +721,9 @@ entry:
define void @vmulwev_h_bu_b(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK-LABEL: vmulwev_h_bu_b:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: xvld $xr2, $a1, 0
+; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 0
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 0
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 2
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 1
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 4
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 2
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 6
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 3
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 8
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 4
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 10
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 5
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 12
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 6
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 14
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 7
-; CHECK-NEXT: xvpermi.d $xr2, $xr2, 14
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 0
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 8
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 2
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 9
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 4
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 10
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 6
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 11
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 8
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 12
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 10
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 13
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 12
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 14
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 14
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 15
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 0
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 0
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 2
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 1
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 4
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 2
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 6
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 3
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 8
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 4
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 10
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 5
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 12
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 6
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 14
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 7
-; CHECK-NEXT: xvpermi.d $xr1, $xr1, 14
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 0
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 8
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 2
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 9
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 4
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 10
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 6
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 11
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 8
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 12
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 10
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 13
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 12
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 14
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 14
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 15
-; CHECK-NEXT: vext2xv.hu.bu $xr0, $xr0
-; CHECK-NEXT: vext2xv.h.b $xr1, $xr2
-; CHECK-NEXT: xvmul.h $xr0, $xr0, $xr1
+; CHECK-NEXT: xvmulwev.h.bu.b $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -1299,43 +743,7 @@ define void @vmulwev_w_hu_h(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 0
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 0
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 2
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 1
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 4
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 2
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 6
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 3
-; CHECK-NEXT: xvpermi.d $xr0, $xr0, 14
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 0
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 4
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 2
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 5
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 4
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 6
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 6
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 7
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 0
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 0
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 2
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 1
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 4
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 2
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 6
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 3
-; CHECK-NEXT: xvpermi.d $xr1, $xr1, 14
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 0
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 4
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 2
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 5
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 4
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 6
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 6
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 7
-; CHECK-NEXT: vext2xv.wu.hu $xr1, $xr2
-; CHECK-NEXT: vext2xv.w.h $xr0, $xr0
-; CHECK-NEXT: xvmul.w $xr0, $xr1, $xr0
+; CHECK-NEXT: xvmulwev.w.hu.h $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -1355,25 +763,7 @@ define void @vmulwev_d_wu_w(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr0, 0
-; CHECK-NEXT: vinsgr2vr.w $vr2, $a1, 0
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr0, 2
-; CHECK-NEXT: vinsgr2vr.w $vr2, $a1, 1
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr0, 4
-; CHECK-NEXT: vinsgr2vr.w $vr2, $a1, 2
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr0, 6
-; CHECK-NEXT: vinsgr2vr.w $vr2, $a1, 3
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr1, 0
-; CHECK-NEXT: vinsgr2vr.w $vr0, $a1, 0
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr1, 2
-; CHECK-NEXT: vinsgr2vr.w $vr0, $a1, 1
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr1, 4
-; CHECK-NEXT: vinsgr2vr.w $vr0, $a1, 2
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr1, 6
-; CHECK-NEXT: vinsgr2vr.w $vr0, $a1, 3
-; CHECK-NEXT: vext2xv.du.wu $xr1, $xr2
-; CHECK-NEXT: vext2xv.d.w $xr0, $xr0
-; CHECK-NEXT: xvmul.d $xr0, $xr1, $xr0
+; CHECK-NEXT: xvmulwev.d.wu.w $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -1515,77 +905,9 @@ entry:
define void @vmulwod_h_bu_b(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK-LABEL: vmulwod_h_bu_b:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: xvld $xr2, $a1, 0
+; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 1
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 0
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 3
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 1
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 5
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 2
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 7
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 3
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 9
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 4
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 11
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 5
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 13
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 6
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 15
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 7
-; CHECK-NEXT: xvpermi.d $xr2, $xr2, 14
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 1
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 8
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 3
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 9
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 5
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 10
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 7
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 11
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 9
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 12
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 11
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 13
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 13
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 14
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 15
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 15
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 1
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 0
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 3
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 1
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 5
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 2
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 7
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 3
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 9
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 4
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 11
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 5
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 13
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 6
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 15
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 7
-; CHECK-NEXT: xvpermi.d $xr1, $xr1, 14
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 1
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 8
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 3
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 9
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 5
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 10
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 7
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 11
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 9
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 12
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 11
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 13
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 13
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 14
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 15
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 15
-; CHECK-NEXT: vext2xv.hu.bu $xr0, $xr0
-; CHECK-NEXT: vext2xv.h.b $xr1, $xr2
-; CHECK-NEXT: xvmul.h $xr0, $xr0, $xr1
+; CHECK-NEXT: xvmulwod.h.bu.b $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -1605,43 +927,7 @@ define void @vmulwod_w_hu_h(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 1
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 0
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 3
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 1
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 5
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 2
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 7
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 3
-; CHECK-NEXT: xvpermi.d $xr0, $xr0, 14
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 1
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 4
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 3
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 5
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 5
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 6
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 7
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 7
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 1
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 0
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 3
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 1
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 5
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 2
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 7
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 3
-; CHECK-NEXT: xvpermi.d $xr1, $xr1, 14
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 1
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 4
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 3
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 5
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 5
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 6
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 7
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 7
-; CHECK-NEXT: vext2xv.wu.hu $xr1, $xr2
-; CHECK-NEXT: vext2xv.w.h $xr0, $xr0
-; CHECK-NEXT: xvmul.w $xr0, $xr1, $xr0
+; CHECK-NEXT: xvmulwod.w.hu.h $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -1661,25 +947,7 @@ define void @vmulwod_d_wu_w(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr0, 1
-; CHECK-NEXT: vinsgr2vr.w $vr2, $a1, 0
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr0, 3
-; CHECK-NEXT: vinsgr2vr.w $vr2, $a1, 1
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr0, 5
-; CHECK-NEXT: vinsgr2vr.w $vr2, $a1, 2
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr0, 7
-; CHECK-NEXT: vinsgr2vr.w $vr2, $a1, 3
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr1, 1
-; CHECK-NEXT: vinsgr2vr.w $vr0, $a1, 0
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr1, 3
-; CHECK-NEXT: vinsgr2vr.w $vr0, $a1, 1
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr1, 5
-; CHECK-NEXT: vinsgr2vr.w $vr0, $a1, 2
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr1, 7
-; CHECK-NEXT: vinsgr2vr.w $vr0, $a1, 3
-; CHECK-NEXT: vext2xv.du.wu $xr1, $xr2
-; CHECK-NEXT: vext2xv.d.w $xr0, $xr0
-; CHECK-NEXT: xvmul.d $xr0, $xr1, $xr0
+; CHECK-NEXT: xvmulwod.d.wu.w $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -1821,77 +1089,9 @@ entry:
define void @vmulwev_h_bu_b_1(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK-LABEL: vmulwev_h_bu_b_1:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: xvld $xr2, $a1, 0
+; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 0
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 0
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 2
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 1
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 4
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 2
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 6
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 3
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 8
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 4
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 10
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 5
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 12
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 6
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 14
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 7
-; CHECK-NEXT: xvpermi.d $xr2, $xr2, 14
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 0
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 8
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 2
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 9
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 4
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 10
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 6
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 11
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 8
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 12
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 10
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 13
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 12
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 14
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 14
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 15
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 0
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 0
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 2
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 1
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 4
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 2
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 6
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 3
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 8
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 4
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 10
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 5
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 12
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 6
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 14
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 7
-; CHECK-NEXT: xvpermi.d $xr1, $xr1, 14
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 0
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 8
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 2
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 9
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 4
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 10
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 6
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 11
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 8
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 12
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 10
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 13
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 12
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 14
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 14
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 15
-; CHECK-NEXT: vext2xv.h.b $xr0, $xr0
-; CHECK-NEXT: vext2xv.hu.bu $xr1, $xr2
-; CHECK-NEXT: xvmul.h $xr0, $xr0, $xr1
+; CHECK-NEXT: xvmulwev.h.bu.b $xr0, $xr1, $xr0
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -1911,43 +1111,7 @@ define void @vmulwev_w_hu_h_1(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 0
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 0
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 2
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 1
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 4
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 2
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 6
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 3
-; CHECK-NEXT: xvpermi.d $xr0, $xr0, 14
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 0
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 4
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 2
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 5
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 4
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 6
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 6
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 7
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 0
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 0
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 2
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 1
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 4
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 2
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 6
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 3
-; CHECK-NEXT: xvpermi.d $xr1, $xr1, 14
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 0
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 4
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 2
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 5
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 4
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 6
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 6
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 7
-; CHECK-NEXT: vext2xv.w.h $xr1, $xr2
-; CHECK-NEXT: vext2xv.wu.hu $xr0, $xr0
-; CHECK-NEXT: xvmul.w $xr0, $xr1, $xr0
+; CHECK-NEXT: xvmulwev.w.hu.h $xr0, $xr1, $xr0
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -1967,25 +1131,7 @@ define void @vmulwev_d_wu_w_1(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr0, 0
-; CHECK-NEXT: vinsgr2vr.w $vr2, $a1, 0
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr0, 2
-; CHECK-NEXT: vinsgr2vr.w $vr2, $a1, 1
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr0, 4
-; CHECK-NEXT: vinsgr2vr.w $vr2, $a1, 2
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr0, 6
-; CHECK-NEXT: vinsgr2vr.w $vr2, $a1, 3
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr1, 0
-; CHECK-NEXT: vinsgr2vr.w $vr0, $a1, 0
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr1, 2
-; CHECK-NEXT: vinsgr2vr.w $vr0, $a1, 1
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr1, 4
-; CHECK-NEXT: vinsgr2vr.w $vr0, $a1, 2
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr1, 6
-; CHECK-NEXT: vinsgr2vr.w $vr0, $a1, 3
-; CHECK-NEXT: vext2xv.d.w $xr1, $xr2
-; CHECK-NEXT: vext2xv.du.wu $xr0, $xr0
-; CHECK-NEXT: xvmul.d $xr0, $xr1, $xr0
+; CHECK-NEXT: xvmulwev.d.wu.w $xr0, $xr1, $xr0
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -2127,77 +1273,9 @@ entry:
define void @vmulwod_h_bu_b_1(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK-LABEL: vmulwod_h_bu_b_1:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: xvld $xr2, $a1, 0
+; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 1
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 0
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 3
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 1
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 5
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 2
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 7
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 3
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 9
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 4
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 11
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 5
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 13
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 6
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 15
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 7
-; CHECK-NEXT: xvpermi.d $xr2, $xr2, 14
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 1
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 8
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 3
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 9
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 5
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 10
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 7
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 11
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 9
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 12
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 11
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 13
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 13
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 14
-; CHECK-NEXT: vpickve2gr.b $a1, $vr2, 15
-; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 15
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 1
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 0
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 3
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 1
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 5
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 2
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 7
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 3
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 9
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 4
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 11
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 5
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 13
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 6
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 15
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 7
-; CHECK-NEXT: xvpermi.d $xr1, $xr1, 14
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 1
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 8
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 3
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 9
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 5
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 10
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 7
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 11
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 9
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 12
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 11
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 13
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 13
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 14
-; CHECK-NEXT: vpickve2gr.b $a1, $vr1, 15
-; CHECK-NEXT: vinsgr2vr.b $vr2, $a1, 15
-; CHECK-NEXT: vext2xv.h.b $xr0, $xr0
-; CHECK-NEXT: vext2xv.hu.bu $xr1, $xr2
-; CHECK-NEXT: xvmul.h $xr0, $xr0, $xr1
+; CHECK-NEXT: xvmulwod.h.bu.b $xr0, $xr1, $xr0
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -2217,43 +1295,7 @@ define void @vmulwod_w_hu_h_1(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 1
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 0
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 3
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 1
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 5
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 2
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 7
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 3
-; CHECK-NEXT: xvpermi.d $xr0, $xr0, 14
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 1
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 4
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 3
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 5
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 5
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 6
-; CHECK-NEXT: vpickve2gr.h $a1, $vr0, 7
-; CHECK-NEXT: vinsgr2vr.h $vr2, $a1, 7
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 1
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 0
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 3
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 1
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 5
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 2
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 7
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 3
-; CHECK-NEXT: xvpermi.d $xr1, $xr1, 14
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 1
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 4
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 3
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 5
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 5
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 6
-; CHECK-NEXT: vpickve2gr.h $a1, $vr1, 7
-; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 7
-; CHECK-NEXT: vext2xv.w.h $xr1, $xr2
-; CHECK-NEXT: vext2xv.wu.hu $xr0, $xr0
-; CHECK-NEXT: xvmul.w $xr0, $xr1, $xr0
+; CHECK-NEXT: xvmulwod.w.hu.h $xr0, $xr1, $xr0
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -2273,25 +1315,7 @@ define void @vmulwod_d_wu_w_1(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr0, 1
-; CHECK-NEXT: vinsgr2vr.w $vr2, $a1, 0
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr0, 3
-; CHECK-NEXT: vinsgr2vr.w $vr2, $a1, 1
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr0, 5
-; CHECK-NEXT: vinsgr2vr.w $vr2, $a1, 2
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr0, 7
-; CHECK-NEXT: vinsgr2vr.w $vr2, $a1, 3
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr1, 1
-; CHECK-NEXT: vinsgr2vr.w $vr0, $a1, 0
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr1, 3
-; CHECK-NEXT: vinsgr2vr.w $vr0, $a1, 1
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr1, 5
-; CHECK-NEXT: vinsgr2vr.w $vr0, $a1, 2
-; CHECK-NEXT: xvpickve2gr.w $a1, $xr1, 7
-; CHECK-NEXT: vinsgr2vr.w $vr0, $a1, 3
-; CHECK-NEXT: vext2xv.d.w $xr1, $xr2
-; CHECK-NEXT: vext2xv.du.wu $xr0, $xr0
-; CHECK-NEXT: xvmul.d $xr0, $xr1, $xr0
+; CHECK-NEXT: xvmulwod.d.wu.w $xr0, $xr1, $xr0
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
diff --git a/llvm/test/CodeGen/LoongArch/lsx/ir-instruction/mulwev_od.ll b/llvm/test/CodeGen/LoongArch/lsx/ir-instruction/mulwev_od.ll
index 40a129bf5c80e..19b5ab50eef95 100644
--- a/llvm/test/CodeGen/LoongArch/lsx/ir-instruction/mulwev_od.ll
+++ b/llvm/test/CodeGen/LoongArch/lsx/ir-instruction/mulwev_od.ll
@@ -7,13 +7,7 @@ define void @vmulwev_h_b(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
-; CHECK-NEXT: vpickev.b $vr0, $vr0, $vr0
-; CHECK-NEXT: vpickev.b $vr1, $vr1, $vr1
-; CHECK-NEXT: vslti.b $vr2, $vr0, 0
-; CHECK-NEXT: vilvl.b $vr0, $vr2, $vr0
-; CHECK-NEXT: vslti.b $vr2, $vr1, 0
-; CHECK-NEXT: vilvl.b $vr1, $vr2, $vr1
-; CHECK-NEXT: vmul.h $vr0, $vr0, $vr1
+; CHECK-NEXT: vmulwev.h.b $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -33,13 +27,7 @@ define void @vmulwev_w_h(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
-; CHECK-NEXT: vpickev.h $vr0, $vr0, $vr0
-; CHECK-NEXT: vpickev.h $vr1, $vr1, $vr1
-; CHECK-NEXT: vslti.h $vr2, $vr0, 0
-; CHECK-NEXT: vilvl.h $vr0, $vr2, $vr0
-; CHECK-NEXT: vslti.h $vr2, $vr1, 0
-; CHECK-NEXT: vilvl.h $vr1, $vr2, $vr1
-; CHECK-NEXT: vmul.w $vr0, $vr0, $vr1
+; CHECK-NEXT: vmulwev.w.h $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -59,13 +47,7 @@ define void @vmulwev_d_w(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
-; CHECK-NEXT: vshuf4i.w $vr0, $vr0, 8
-; CHECK-NEXT: vshuf4i.w $vr1, $vr1, 8
-; CHECK-NEXT: vslti.w $vr2, $vr0, 0
-; CHECK-NEXT: vilvl.w $vr0, $vr2, $vr0
-; CHECK-NEXT: vslti.w $vr2, $vr1, 0
-; CHECK-NEXT: vilvl.w $vr1, $vr2, $vr1
-; CHECK-NEXT: vmul.d $vr0, $vr0, $vr1
+; CHECK-NEXT: vmulwev.d.w $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -161,13 +143,7 @@ define void @vmulwod_h_b(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
-; CHECK-NEXT: vpickod.b $vr0, $vr0, $vr0
-; CHECK-NEXT: vpickod.b $vr1, $vr1, $vr1
-; CHECK-NEXT: vslti.b $vr2, $vr0, 0
-; CHECK-NEXT: vilvl.b $vr0, $vr2, $vr0
-; CHECK-NEXT: vslti.b $vr2, $vr1, 0
-; CHECK-NEXT: vilvl.b $vr1, $vr2, $vr1
-; CHECK-NEXT: vmul.h $vr0, $vr0, $vr1
+; CHECK-NEXT: vmulwod.h.b $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -187,13 +163,7 @@ define void @vmulwod_w_h(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
-; CHECK-NEXT: vpickod.h $vr0, $vr0, $vr0
-; CHECK-NEXT: vpickod.h $vr1, $vr1, $vr1
-; CHECK-NEXT: vslti.h $vr2, $vr0, 0
-; CHECK-NEXT: vilvl.h $vr0, $vr2, $vr0
-; CHECK-NEXT: vslti.h $vr2, $vr1, 0
-; CHECK-NEXT: vilvl.h $vr1, $vr2, $vr1
-; CHECK-NEXT: vmul.w $vr0, $vr0, $vr1
+; CHECK-NEXT: vmulwod.w.h $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -213,13 +183,7 @@ define void @vmulwod_d_w(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
-; CHECK-NEXT: vshuf4i.w $vr0, $vr0, 13
-; CHECK-NEXT: vshuf4i.w $vr1, $vr1, 13
-; CHECK-NEXT: vslti.w $vr2, $vr0, 0
-; CHECK-NEXT: vilvl.w $vr0, $vr2, $vr0
-; CHECK-NEXT: vslti.w $vr2, $vr1, 0
-; CHECK-NEXT: vilvl.w $vr1, $vr2, $vr1
-; CHECK-NEXT: vmul.d $vr0, $vr0, $vr1
+; CHECK-NEXT: vmulwod.d.w $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -314,13 +278,8 @@ define void @vmulwev_h_bu(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK-LABEL: vmulwev_h_bu:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a1, 0
-; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI8_0)
-; CHECK-NEXT: vld $vr1, $a1, %pc_lo12(.LCPI8_0)
-; CHECK-NEXT: vld $vr2, $a2, 0
-; CHECK-NEXT: vrepli.b $vr3, 0
-; CHECK-NEXT: vshuf.b $vr0, $vr3, $vr0, $vr1
-; CHECK-NEXT: vshuf.b $vr1, $vr3, $vr2, $vr1
-; CHECK-NEXT: vmul.h $vr0, $vr0, $vr1
+; CHECK-NEXT: vld $vr1, $a2, 0
+; CHECK-NEXT: vmulwev.h.bu $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -338,15 +297,9 @@ entry:
define void @vmulwev_w_hu(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK-LABEL: vmulwev_w_hu:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: pcalau12i $a3, %pc_hi20(.LCPI9_0)
-; CHECK-NEXT: vld $vr0, $a3, %pc_lo12(.LCPI9_0)
-; CHECK-NEXT: vld $vr1, $a1, 0
-; CHECK-NEXT: vld $vr2, $a2, 0
-; CHECK-NEXT: vrepli.b $vr3, 0
-; CHECK-NEXT: vori.b $vr4, $vr0, 0
-; CHECK-NEXT: vshuf.h $vr4, $vr3, $vr1
-; CHECK-NEXT: vshuf.h $vr0, $vr3, $vr2
-; CHECK-NEXT: vmul.w $vr0, $vr4, $vr0
+; CHECK-NEXT: vld $vr0, $a1, 0
+; CHECK-NEXT: vld $vr1, $a2, 0
+; CHECK-NEXT: vmulwev.w.hu $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -364,15 +317,9 @@ entry:
define void @vmulwev_d_wu(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK-LABEL: vmulwev_d_wu:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: pcalau12i $a3, %pc_hi20(.LCPI10_0)
-; CHECK-NEXT: vld $vr0, $a3, %pc_lo12(.LCPI10_0)
-; CHECK-NEXT: vld $vr1, $a1, 0
-; CHECK-NEXT: vld $vr2, $a2, 0
-; CHECK-NEXT: vrepli.b $vr3, 0
-; CHECK-NEXT: vori.b $vr4, $vr0, 0
-; CHECK-NEXT: vshuf.w $vr4, $vr3, $vr1
-; CHECK-NEXT: vshuf.w $vr0, $vr3, $vr2
-; CHECK-NEXT: vmul.d $vr0, $vr4, $vr0
+; CHECK-NEXT: vld $vr0, $a1, 0
+; CHECK-NEXT: vld $vr1, $a2, 0
+; CHECK-NEXT: vmulwev.d.wu $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -448,10 +395,7 @@ define void @vmulwod_h_bu(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
-; CHECK-NEXT: vrepli.b $vr2, 0
-; CHECK-NEXT: vpackod.b $vr0, $vr2, $vr0
-; CHECK-NEXT: vpackod.b $vr1, $vr2, $vr1
-; CHECK-NEXT: vmul.h $vr0, $vr0, $vr1
+; CHECK-NEXT: vmulwod.h.bu $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -471,10 +415,7 @@ define void @vmulwod_w_hu(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
-; CHECK-NEXT: vrepli.b $vr2, 0
-; CHECK-NEXT: vpackod.h $vr0, $vr2, $vr0
-; CHECK-NEXT: vpackod.h $vr1, $vr2, $vr1
-; CHECK-NEXT: vmul.w $vr0, $vr0, $vr1
+; CHECK-NEXT: vmulwod.w.hu $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -494,10 +435,7 @@ define void @vmulwod_d_wu(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
-; CHECK-NEXT: vrepli.b $vr2, 0
-; CHECK-NEXT: vpackod.w $vr0, $vr2, $vr0
-; CHECK-NEXT: vpackod.w $vr1, $vr2, $vr1
-; CHECK-NEXT: vmul.d $vr0, $vr0, $vr1
+; CHECK-NEXT: vmulwod.d.wu $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -573,14 +511,7 @@ define void @vmulwev_h_bu_b(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
-; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI16_0)
-; CHECK-NEXT: vld $vr2, $a1, %pc_lo12(.LCPI16_0)
-; CHECK-NEXT: vpickev.b $vr1, $vr1, $vr1
-; CHECK-NEXT: vrepli.b $vr3, 0
-; CHECK-NEXT: vshuf.b $vr0, $vr3, $vr0, $vr2
-; CHECK-NEXT: vslti.b $vr2, $vr1, 0
-; CHECK-NEXT: vilvl.b $vr1, $vr2, $vr1
-; CHECK-NEXT: vmul.h $vr0, $vr0, $vr1
+; CHECK-NEXT: vmulwev.h.bu.b $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -600,14 +531,7 @@ define void @vmulwev_w_hu_h(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
-; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI17_0)
-; CHECK-NEXT: vld $vr2, $a1, %pc_lo12(.LCPI17_0)
-; CHECK-NEXT: vpickev.h $vr1, $vr1, $vr1
-; CHECK-NEXT: vrepli.b $vr3, 0
-; CHECK-NEXT: vshuf.h $vr2, $vr3, $vr0
-; CHECK-NEXT: vslti.h $vr0, $vr1, 0
-; CHECK-NEXT: vilvl.h $vr0, $vr0, $vr1
-; CHECK-NEXT: vmul.w $vr0, $vr2, $vr0
+; CHECK-NEXT: vmulwev.w.hu.h $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -627,14 +551,7 @@ define void @vmulwev_d_wu_w(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
-; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI18_0)
-; CHECK-NEXT: vld $vr2, $a1, %pc_lo12(.LCPI18_0)
-; CHECK-NEXT: vshuf4i.w $vr1, $vr1, 8
-; CHECK-NEXT: vrepli.b $vr3, 0
-; CHECK-NEXT: vshuf.w $vr2, $vr3, $vr0
-; CHECK-NEXT: vslti.w $vr0, $vr1, 0
-; CHECK-NEXT: vilvl.w $vr0, $vr0, $vr1
-; CHECK-NEXT: vmul.d $vr0, $vr2, $vr0
+; CHECK-NEXT: vmulwev.d.wu.w $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -721,14 +638,9 @@ entry:
define void @vmulwod_h_bu_b(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK-LABEL: vmulwod_h_bu_b:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: vld $vr0, $a2, 0
-; CHECK-NEXT: vld $vr1, $a1, 0
-; CHECK-NEXT: vpickod.b $vr0, $vr0, $vr0
-; CHECK-NEXT: vrepli.b $vr2, 0
-; CHECK-NEXT: vpackod.b $vr1, $vr2, $vr1
-; CHECK-NEXT: vslti.b $vr2, $vr0, 0
-; CHECK-NEXT: vilvl.b $vr0, $vr2, $vr0
-; CHECK-NEXT: vmul.h $vr0, $vr1, $vr0
+; CHECK-NEXT: vld $vr0, $a1, 0
+; CHECK-NEXT: vld $vr1, $a2, 0
+; CHECK-NEXT: vmulwod.h.bu.b $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -746,14 +658,9 @@ entry:
define void @vmulwod_w_hu_h(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK-LABEL: vmulwod_w_hu_h:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: vld $vr0, $a2, 0
-; CHECK-NEXT: vld $vr1, $a1, 0
-; CHECK-NEXT: vpickod.h $vr0, $vr0, $vr0
-; CHECK-NEXT: vrepli.b $vr2, 0
-; CHECK-NEXT: vpackod.h $vr1, $vr2, $vr1
-; CHECK-NEXT: vslti.h $vr2, $vr0, 0
-; CHECK-NEXT: vilvl.h $vr0, $vr2, $vr0
-; CHECK-NEXT: vmul.w $vr0, $vr1, $vr0
+; CHECK-NEXT: vld $vr0, $a1, 0
+; CHECK-NEXT: vld $vr1, $a2, 0
+; CHECK-NEXT: vmulwod.w.hu.h $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -771,14 +678,9 @@ entry:
define void @vmulwod_d_wu_w(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK-LABEL: vmulwod_d_wu_w:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: vld $vr0, $a2, 0
-; CHECK-NEXT: vld $vr1, $a1, 0
-; CHECK-NEXT: vshuf4i.w $vr0, $vr0, 13
-; CHECK-NEXT: vrepli.b $vr2, 0
-; CHECK-NEXT: vpackod.w $vr1, $vr2, $vr1
-; CHECK-NEXT: vslti.w $vr2, $vr0, 0
-; CHECK-NEXT: vilvl.w $vr0, $vr2, $vr0
-; CHECK-NEXT: vmul.d $vr0, $vr1, $vr0
+; CHECK-NEXT: vld $vr0, $a1, 0
+; CHECK-NEXT: vld $vr1, $a2, 0
+; CHECK-NEXT: vmulwod.d.wu.w $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -867,14 +769,7 @@ define void @vmulwev_h_bu_b_1(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
-; CHECK-NEXT: vpickev.b $vr0, $vr0, $vr0
-; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI24_0)
-; CHECK-NEXT: vld $vr2, $a1, %pc_lo12(.LCPI24_0)
-; CHECK-NEXT: vslti.b $vr3, $vr0, 0
-; CHECK-NEXT: vilvl.b $vr0, $vr3, $vr0
-; CHECK-NEXT: vrepli.b $vr3, 0
-; CHECK-NEXT: vshuf.b $vr1, $vr3, $vr1, $vr2
-; CHECK-NEXT: vmul.h $vr0, $vr0, $vr1
+; CHECK-NEXT: vmulwev.h.bu.b $vr0, $vr1, $vr0
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -894,14 +789,7 @@ define void @vmulwev_w_hu_h_1(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
-; CHECK-NEXT: vpickev.h $vr0, $vr0, $vr0
-; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI25_0)
-; CHECK-NEXT: vld $vr2, $a1, %pc_lo12(.LCPI25_0)
-; CHECK-NEXT: vslti.h $vr3, $vr0, 0
-; CHECK-NEXT: vilvl.h $vr0, $vr3, $vr0
-; CHECK-NEXT: vrepli.b $vr3, 0
-; CHECK-NEXT: vshuf.h $vr2, $vr3, $vr1
-; CHECK-NEXT: vmul.w $vr0, $vr0, $vr2
+; CHECK-NEXT: vmulwev.w.hu.h $vr0, $vr1, $vr0
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -921,14 +809,7 @@ define void @vmulwev_d_wu_w_1(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
-; CHECK-NEXT: vshuf4i.w $vr0, $vr0, 8
-; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI26_0)
-; CHECK-NEXT: vld $vr2, $a1, %pc_lo12(.LCPI26_0)
-; CHECK-NEXT: vslti.w $vr3, $vr0, 0
-; CHECK-NEXT: vilvl.w $vr0, $vr3, $vr0
-; CHECK-NEXT: vrepli.b $vr3, 0
-; CHECK-NEXT: vshuf.w $vr2, $vr3, $vr1
-; CHECK-NEXT: vmul.d $vr0, $vr0, $vr2
+; CHECK-NEXT: vmulwev.d.wu.w $vr0, $vr1, $vr0
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -1017,12 +898,7 @@ define void @vmulwod_h_bu_b_1(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
-; CHECK-NEXT: vpickod.b $vr0, $vr0, $vr0
-; CHECK-NEXT: vslti.b $vr2, $vr0, 0
-; CHECK-NEXT: vilvl.b $vr0, $vr2, $vr0
-; CHECK-NEXT: vrepli.b $vr2, 0
-; CHECK-NEXT: vpackod.b $vr1, $vr2, $vr1
-; CHECK-NEXT: vmul.h $vr0, $vr0, $vr1
+; CHECK-NEXT: vmulwod.h.bu.b $vr0, $vr1, $vr0
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -1042,12 +918,7 @@ define void @vmulwod_w_hu_h_1(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
-; CHECK-NEXT: vpickod.h $vr0, $vr0, $vr0
-; CHECK-NEXT: vslti.h $vr2, $vr0, 0
-; CHECK-NEXT: vilvl.h $vr0, $vr2, $vr0
-; CHECK-NEXT: vrepli.b $vr2, 0
-; CHECK-NEXT: vpackod.h $vr1, $vr2, $vr1
-; CHECK-NEXT: vmul.w $vr0, $vr0, $vr1
+; CHECK-NEXT: vmulwod.w.hu.h $vr0, $vr1, $vr0
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -1067,12 +938,7 @@ define void @vmulwod_d_wu_w_1(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
-; CHECK-NEXT: vshuf4i.w $vr0, $vr0, 13
-; CHECK-NEXT: vslti.w $vr2, $vr0, 0
-; CHECK-NEXT: vilvl.w $vr0, $vr2, $vr0
-; CHECK-NEXT: vrepli.b $vr2, 0
-; CHECK-NEXT: vpackod.w $vr1, $vr2, $vr1
-; CHECK-NEXT: vmul.d $vr0, $vr0, $vr1
+; CHECK-NEXT: vmulwod.d.wu.w $vr0, $vr1, $vr0
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
>From 0ad4a00e70fed93e4d969ba9fd7d6584e3963ae3 Mon Sep 17 00:00:00 2001
From: Qi Zhao <zhaoqi01 at loongson.cn>
Date: Thu, 9 Oct 2025 15:59:19 +0800
Subject: [PATCH 2/3] deal with lsx i128
---
.../LoongArch/LoongArchISelLowering.cpp | 56 ++-
.../LoongArch/lsx/ir-instruction/mulwev_od.ll | 452 ++++--------------
2 files changed, 130 insertions(+), 378 deletions(-)
diff --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
index 97bda538e061f..c6c4f62c29826 100644
--- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
@@ -8910,15 +8910,15 @@ static SDValue performMULCombine(SDNode *N, SelectionDAG &DAG,
SDValue N1 = N->getOperand(1);
if (ResTy != MVT::v8i16 && ResTy != MVT::v4i32 && ResTy != MVT::v2i64 &&
- ResTy != MVT::v16i16 && ResTy != MVT::v8i32 &&
- ResTy != MVT::v4i64) // && ResTy != MVT::v2i128)
+ ResTy != MVT::v16i16 && ResTy != MVT::v8i32 && ResTy != MVT::v4i64 &&
+ ResTy != MVT::i128)
return SDValue();
// Combine:
// ti,tii,...,tx = extract_vector_elt t0, {0,2,4,.../1,3,5,...}
// tj,tjj,...,ty = extract_vector_elt t1, {0,2,4,.../1,3,5,...}
- // tm = BUILD_VECTOR ti,tii,...,tx
- // tn = BUILD_VECTOR tj,tjj,...,ty
+ // tm = BUILD_VECTOR ti,tii,...,tx (Only when ResTy != MVT::i128)
+ // tn = BUILD_VECTOR tj,tjj,...,ty (Only when ResTy != MVT::i128)
// ta = {sign/zero}_extend tm
// tb = {sign/zero}_extend tn
// tr = mul ta, tb
@@ -8940,24 +8940,36 @@ static SDValue performMULCombine(SDNode *N, SelectionDAG &DAG,
if (ExtType < 0)
return SDValue();
- SDValue BV0 = N0.getOperand(0);
- SDValue BV1 = N1.getOperand(0);
- if (BV0.getOpcode() != ISD::BUILD_VECTOR ||
- BV1.getOpcode() != ISD::BUILD_VECTOR)
+ SDValue Src0 = N0.getOperand(0);
+ SDValue Src1 = N1.getOperand(0);
+ bool IsScalar = (ResTy == MVT::i128);
+ if (IsScalar && (Src0.getOpcode() != ISD::EXTRACT_VECTOR_ELT ||
+ Src1.getOpcode() != ISD::EXTRACT_VECTOR_ELT))
+ return SDValue();
+ if (!IsScalar && (Src0.getOpcode() != ISD::BUILD_VECTOR ||
+ Src1.getOpcode() != ISD::BUILD_VECTOR))
return SDValue();
- unsigned ResBits = ResTy.getScalarType().getSizeInBits();
- unsigned BV0Bits = BV0.getValueType().getScalarType().getSizeInBits();
- unsigned BV1Bits = BV1.getValueType().getScalarType().getSizeInBits();
- if (BV0Bits != BV1Bits || ResBits != BV0Bits * 2)
+ unsigned ResBits = ResTy.getScalarSizeInBits();
+ unsigned Src0Bits = Src0.getValueType().getScalarSizeInBits();
+ unsigned Src1Bits = Src1.getValueType().getScalarSizeInBits();
+ if (Src0Bits != Src1Bits || ResBits != Src0Bits * 2)
return SDValue();
+ // Collect all EXTRACT_VECTOR_ELT.
+ SmallVector<std::pair<SDValue, SDValue>> Elems;
+ if (IsScalar) {
+ Elems.emplace_back(Src0, Src1);
+ } else {
+ for (unsigned i = 0; i < Src0.getNumOperands(); ++i)
+ Elems.emplace_back(Src0.getOperand(i), Src1.getOperand(i));
+ }
+
unsigned Index;
SDValue OrigN0, OrigN1;
- for (unsigned i = 0; i < BV0.getNumOperands(); ++i) {
- SDValue Op0 = BV0.getOperand(i);
- SDValue Op1 = BV1.getOperand(i);
- // Each element of BUILD_VECTOR must be EXTRACT_VECTOR_ELT.
+ bool First = true;
+ for (auto &[Op0, Op1] : Elems) {
+ // Each element must be EXTRACT_VECTOR_ELT.
if (Op0.getOpcode() != ISD::EXTRACT_VECTOR_ELT ||
Op1.getOpcode() != ISD::EXTRACT_VECTOR_ELT)
return SDValue();
@@ -8969,17 +8981,17 @@ static SDValue performMULCombine(SDNode *N, SelectionDAG &DAG,
auto *IdxC = dyn_cast<ConstantSDNode>(Op0.getOperand(1));
if (!IdxC)
return SDValue();
- unsigned CurIdx = IdxC->getZExtValue();
- if (i == 0) {
+ unsigned CurIdx = IdxC->getZExtValue();
+ if (First) {
if (CurIdx != 0 && CurIdx != 1)
return SDValue();
OrigN0 = Op0.getOperand(0);
OrigN1 = Op1.getOperand(0);
+ First = false;
} else {
- if (CurIdx != Index + 2)
- return SDValue();
- if (Op0.getOperand(0) != OrigN0 || Op1.getOperand(0) != OrigN1)
+ if (CurIdx != Index + 2 || Op0.getOperand(0) != OrigN0 ||
+ Op1.getOperand(0) != OrigN1)
return SDValue();
}
Index = CurIdx;
@@ -8988,7 +9000,7 @@ static SDValue performMULCombine(SDNode *N, SelectionDAG &DAG,
if (OrigN0.getValueType() != OrigN1.getValueType())
return SDValue();
if (OrigN0.getValueType().getVectorNumElements() !=
- ResTy.getVectorNumElements() * 2)
+ (IsScalar ? 1 : ResTy.getVectorNumElements()) * 2)
return SDValue();
SDValue Result;
diff --git a/llvm/test/CodeGen/LoongArch/lsx/ir-instruction/mulwev_od.ll b/llvm/test/CodeGen/LoongArch/lsx/ir-instruction/mulwev_od.ll
index 19b5ab50eef95..3036fcfa49fec 100644
--- a/llvm/test/CodeGen/LoongArch/lsx/ir-instruction/mulwev_od.ll
+++ b/llvm/test/CodeGen/LoongArch/lsx/ir-instruction/mulwev_od.ll
@@ -67,64 +67,23 @@ define void @vmulwev_q_d(ptr %res, ptr %a, ptr %b) nounwind {
; LA32: # %bb.0: # %entry
; LA32-NEXT: vld $vr0, $a1, 0
; LA32-NEXT: vld $vr1, $a2, 0
+; LA32-NEXT: vmulwev.q.d $vr0, $vr0, $vr1
; LA32-NEXT: vpickve2gr.w $a1, $vr0, 0
; LA32-NEXT: vpickve2gr.w $a2, $vr0, 1
-; LA32-NEXT: vpickve2gr.w $a3, $vr1, 0
-; LA32-NEXT: vpickve2gr.w $a4, $vr1, 1
-; LA32-NEXT: srai.w $a5, $a2, 31
-; LA32-NEXT: srai.w $a6, $a4, 31
-; LA32-NEXT: mulh.wu $a7, $a1, $a3
-; LA32-NEXT: mul.w $t0, $a2, $a3
-; LA32-NEXT: add.w $a7, $t0, $a7
-; LA32-NEXT: sltu $t0, $a7, $t0
-; LA32-NEXT: mulh.wu $t1, $a2, $a3
-; LA32-NEXT: add.w $t0, $t1, $t0
-; LA32-NEXT: mul.w $t1, $a1, $a4
-; LA32-NEXT: add.w $a7, $t1, $a7
-; LA32-NEXT: sltu $t1, $a7, $t1
-; LA32-NEXT: mulh.wu $t2, $a1, $a4
-; LA32-NEXT: add.w $t1, $t2, $t1
-; LA32-NEXT: add.w $t1, $t0, $t1
-; LA32-NEXT: mul.w $t2, $a2, $a4
-; LA32-NEXT: add.w $t3, $t2, $t1
-; LA32-NEXT: mul.w $t4, $a3, $a5
-; LA32-NEXT: mul.w $t5, $a6, $a1
-; LA32-NEXT: add.w $t6, $t5, $t4
-; LA32-NEXT: add.w $t7, $t3, $t6
-; LA32-NEXT: sltu $t8, $t7, $t3
-; LA32-NEXT: sltu $t2, $t3, $t2
-; LA32-NEXT: sltu $t0, $t1, $t0
-; LA32-NEXT: mulh.wu $t1, $a2, $a4
-; LA32-NEXT: add.w $t0, $t1, $t0
-; LA32-NEXT: add.w $t0, $t0, $t2
-; LA32-NEXT: mulh.wu $t1, $a3, $a5
-; LA32-NEXT: add.w $t1, $t1, $t4
-; LA32-NEXT: mul.w $a4, $a4, $a5
-; LA32-NEXT: add.w $a4, $t1, $a4
-; LA32-NEXT: mul.w $a2, $a6, $a2
-; LA32-NEXT: mulh.wu $a5, $a6, $a1
-; LA32-NEXT: add.w $a2, $a5, $a2
-; LA32-NEXT: add.w $a2, $a2, $t5
-; LA32-NEXT: add.w $a2, $a2, $a4
-; LA32-NEXT: sltu $a4, $t6, $t5
-; LA32-NEXT: add.w $a2, $a2, $a4
-; LA32-NEXT: add.w $a2, $t0, $a2
-; LA32-NEXT: add.w $a2, $a2, $t8
-; LA32-NEXT: mul.w $a1, $a1, $a3
+; LA32-NEXT: vpickve2gr.w $a3, $vr0, 2
+; LA32-NEXT: vpickve2gr.w $a4, $vr0, 3
+; LA32-NEXT: st.w $a4, $a0, 12
+; LA32-NEXT: st.w $a3, $a0, 8
+; LA32-NEXT: st.w $a2, $a0, 4
; LA32-NEXT: st.w $a1, $a0, 0
-; LA32-NEXT: st.w $a7, $a0, 4
-; LA32-NEXT: st.w $t7, $a0, 8
-; LA32-NEXT: st.w $a2, $a0, 12
; LA32-NEXT: ret
;
; LA64-LABEL: vmulwev_q_d:
; LA64: # %bb.0: # %entry
-; LA64-NEXT: ld.d $a1, $a1, 0
-; LA64-NEXT: ld.d $a2, $a2, 0
-; LA64-NEXT: mul.d $a3, $a1, $a2
-; LA64-NEXT: mulh.d $a1, $a1, $a2
-; LA64-NEXT: st.d $a1, $a0, 8
-; LA64-NEXT: st.d $a3, $a0, 0
+; LA64-NEXT: vld $vr0, $a1, 0
+; LA64-NEXT: vld $vr1, $a2, 0
+; LA64-NEXT: vmulwev.q.d $vr0, $vr0, $vr1
+; LA64-NEXT: vst $vr0, $a0, 0
; LA64-NEXT: ret
entry:
%va = load <2 x i64>, ptr %a
@@ -203,64 +162,23 @@ define void @vmulwod_q_d(ptr %res, ptr %a, ptr %b) nounwind {
; LA32: # %bb.0: # %entry
; LA32-NEXT: vld $vr0, $a1, 0
; LA32-NEXT: vld $vr1, $a2, 0
-; LA32-NEXT: vpickve2gr.w $a1, $vr0, 2
-; LA32-NEXT: vpickve2gr.w $a2, $vr0, 3
-; LA32-NEXT: vpickve2gr.w $a3, $vr1, 2
-; LA32-NEXT: vpickve2gr.w $a4, $vr1, 3
-; LA32-NEXT: srai.w $a5, $a2, 31
-; LA32-NEXT: srai.w $a6, $a4, 31
-; LA32-NEXT: mulh.wu $a7, $a1, $a3
-; LA32-NEXT: mul.w $t0, $a2, $a3
-; LA32-NEXT: add.w $a7, $t0, $a7
-; LA32-NEXT: sltu $t0, $a7, $t0
-; LA32-NEXT: mulh.wu $t1, $a2, $a3
-; LA32-NEXT: add.w $t0, $t1, $t0
-; LA32-NEXT: mul.w $t1, $a1, $a4
-; LA32-NEXT: add.w $a7, $t1, $a7
-; LA32-NEXT: sltu $t1, $a7, $t1
-; LA32-NEXT: mulh.wu $t2, $a1, $a4
-; LA32-NEXT: add.w $t1, $t2, $t1
-; LA32-NEXT: add.w $t1, $t0, $t1
-; LA32-NEXT: mul.w $t2, $a2, $a4
-; LA32-NEXT: add.w $t3, $t2, $t1
-; LA32-NEXT: mul.w $t4, $a3, $a5
-; LA32-NEXT: mul.w $t5, $a6, $a1
-; LA32-NEXT: add.w $t6, $t5, $t4
-; LA32-NEXT: add.w $t7, $t3, $t6
-; LA32-NEXT: sltu $t8, $t7, $t3
-; LA32-NEXT: sltu $t2, $t3, $t2
-; LA32-NEXT: sltu $t0, $t1, $t0
-; LA32-NEXT: mulh.wu $t1, $a2, $a4
-; LA32-NEXT: add.w $t0, $t1, $t0
-; LA32-NEXT: add.w $t0, $t0, $t2
-; LA32-NEXT: mulh.wu $t1, $a3, $a5
-; LA32-NEXT: add.w $t1, $t1, $t4
-; LA32-NEXT: mul.w $a4, $a4, $a5
-; LA32-NEXT: add.w $a4, $t1, $a4
-; LA32-NEXT: mul.w $a2, $a6, $a2
-; LA32-NEXT: mulh.wu $a5, $a6, $a1
-; LA32-NEXT: add.w $a2, $a5, $a2
-; LA32-NEXT: add.w $a2, $a2, $t5
-; LA32-NEXT: add.w $a2, $a2, $a4
-; LA32-NEXT: sltu $a4, $t6, $t5
-; LA32-NEXT: add.w $a2, $a2, $a4
-; LA32-NEXT: add.w $a2, $t0, $a2
-; LA32-NEXT: add.w $a2, $a2, $t8
-; LA32-NEXT: mul.w $a1, $a1, $a3
+; LA32-NEXT: vmulwod.q.d $vr0, $vr0, $vr1
+; LA32-NEXT: vpickve2gr.w $a1, $vr0, 0
+; LA32-NEXT: vpickve2gr.w $a2, $vr0, 1
+; LA32-NEXT: vpickve2gr.w $a3, $vr0, 2
+; LA32-NEXT: vpickve2gr.w $a4, $vr0, 3
+; LA32-NEXT: st.w $a4, $a0, 12
+; LA32-NEXT: st.w $a3, $a0, 8
+; LA32-NEXT: st.w $a2, $a0, 4
; LA32-NEXT: st.w $a1, $a0, 0
-; LA32-NEXT: st.w $a7, $a0, 4
-; LA32-NEXT: st.w $t7, $a0, 8
-; LA32-NEXT: st.w $a2, $a0, 12
; LA32-NEXT: ret
;
; LA64-LABEL: vmulwod_q_d:
; LA64: # %bb.0: # %entry
-; LA64-NEXT: ld.d $a1, $a1, 8
-; LA64-NEXT: ld.d $a2, $a2, 8
-; LA64-NEXT: mul.d $a3, $a1, $a2
-; LA64-NEXT: mulh.d $a1, $a1, $a2
-; LA64-NEXT: st.d $a1, $a0, 8
-; LA64-NEXT: st.d $a3, $a0, 0
+; LA64-NEXT: vld $vr0, $a1, 0
+; LA64-NEXT: vld $vr1, $a2, 0
+; LA64-NEXT: vmulwod.q.d $vr0, $vr0, $vr1
+; LA64-NEXT: vst $vr0, $a0, 0
; LA64-NEXT: ret
entry:
%va = load <2 x i64>, ptr %a
@@ -339,44 +257,23 @@ define void @vmulwev_q_du(ptr %res, ptr %a, ptr %b) nounwind {
; LA32: # %bb.0: # %entry
; LA32-NEXT: vld $vr0, $a1, 0
; LA32-NEXT: vld $vr1, $a2, 0
-; LA32-NEXT: vpickve2gr.w $a1, $vr0, 1
-; LA32-NEXT: vpickve2gr.w $a2, $vr0, 0
-; LA32-NEXT: vpickve2gr.w $a3, $vr1, 1
-; LA32-NEXT: vpickve2gr.w $a4, $vr1, 0
-; LA32-NEXT: mulh.wu $a5, $a2, $a4
-; LA32-NEXT: mul.w $a6, $a1, $a4
-; LA32-NEXT: add.w $a5, $a6, $a5
-; LA32-NEXT: sltu $a6, $a5, $a6
-; LA32-NEXT: mulh.wu $a7, $a1, $a4
-; LA32-NEXT: add.w $a6, $a7, $a6
-; LA32-NEXT: mul.w $a7, $a2, $a3
-; LA32-NEXT: add.w $a5, $a7, $a5
-; LA32-NEXT: sltu $a7, $a5, $a7
-; LA32-NEXT: mulh.wu $t0, $a2, $a3
-; LA32-NEXT: add.w $a7, $t0, $a7
-; LA32-NEXT: add.w $a7, $a6, $a7
-; LA32-NEXT: mul.w $t0, $a1, $a3
-; LA32-NEXT: add.w $t1, $t0, $a7
-; LA32-NEXT: sltu $t0, $t1, $t0
-; LA32-NEXT: sltu $a6, $a7, $a6
-; LA32-NEXT: mulh.wu $a1, $a1, $a3
-; LA32-NEXT: add.w $a1, $a1, $a6
-; LA32-NEXT: add.w $a1, $a1, $t0
-; LA32-NEXT: mul.w $a2, $a2, $a4
-; LA32-NEXT: st.w $a2, $a0, 0
-; LA32-NEXT: st.w $a5, $a0, 4
-; LA32-NEXT: st.w $t1, $a0, 8
-; LA32-NEXT: st.w $a1, $a0, 12
+; LA32-NEXT: vmulwev.q.du $vr0, $vr0, $vr1
+; LA32-NEXT: vpickve2gr.w $a1, $vr0, 0
+; LA32-NEXT: vpickve2gr.w $a2, $vr0, 1
+; LA32-NEXT: vpickve2gr.w $a3, $vr0, 2
+; LA32-NEXT: vpickve2gr.w $a4, $vr0, 3
+; LA32-NEXT: st.w $a4, $a0, 12
+; LA32-NEXT: st.w $a3, $a0, 8
+; LA32-NEXT: st.w $a2, $a0, 4
+; LA32-NEXT: st.w $a1, $a0, 0
; LA32-NEXT: ret
;
; LA64-LABEL: vmulwev_q_du:
; LA64: # %bb.0: # %entry
-; LA64-NEXT: ld.d $a1, $a1, 0
-; LA64-NEXT: ld.d $a2, $a2, 0
-; LA64-NEXT: mul.d $a3, $a1, $a2
-; LA64-NEXT: mulh.du $a1, $a1, $a2
-; LA64-NEXT: st.d $a1, $a0, 8
-; LA64-NEXT: st.d $a3, $a0, 0
+; LA64-NEXT: vld $vr0, $a1, 0
+; LA64-NEXT: vld $vr1, $a2, 0
+; LA64-NEXT: vmulwev.q.du $vr0, $vr0, $vr1
+; LA64-NEXT: vst $vr0, $a0, 0
; LA64-NEXT: ret
entry:
%va = load <2 x i64>, ptr %a
@@ -455,44 +352,23 @@ define void @vmulwod_q_du(ptr %res, ptr %a, ptr %b) nounwind {
; LA32: # %bb.0: # %entry
; LA32-NEXT: vld $vr0, $a1, 0
; LA32-NEXT: vld $vr1, $a2, 0
-; LA32-NEXT: vpickve2gr.w $a1, $vr0, 3
-; LA32-NEXT: vpickve2gr.w $a2, $vr0, 2
-; LA32-NEXT: vpickve2gr.w $a3, $vr1, 3
-; LA32-NEXT: vpickve2gr.w $a4, $vr1, 2
-; LA32-NEXT: mulh.wu $a5, $a2, $a4
-; LA32-NEXT: mul.w $a6, $a1, $a4
-; LA32-NEXT: add.w $a5, $a6, $a5
-; LA32-NEXT: sltu $a6, $a5, $a6
-; LA32-NEXT: mulh.wu $a7, $a1, $a4
-; LA32-NEXT: add.w $a6, $a7, $a6
-; LA32-NEXT: mul.w $a7, $a2, $a3
-; LA32-NEXT: add.w $a5, $a7, $a5
-; LA32-NEXT: sltu $a7, $a5, $a7
-; LA32-NEXT: mulh.wu $t0, $a2, $a3
-; LA32-NEXT: add.w $a7, $t0, $a7
-; LA32-NEXT: add.w $a7, $a6, $a7
-; LA32-NEXT: mul.w $t0, $a1, $a3
-; LA32-NEXT: add.w $t1, $t0, $a7
-; LA32-NEXT: sltu $t0, $t1, $t0
-; LA32-NEXT: sltu $a6, $a7, $a6
-; LA32-NEXT: mulh.wu $a1, $a1, $a3
-; LA32-NEXT: add.w $a1, $a1, $a6
-; LA32-NEXT: add.w $a1, $a1, $t0
-; LA32-NEXT: mul.w $a2, $a2, $a4
-; LA32-NEXT: st.w $a2, $a0, 0
-; LA32-NEXT: st.w $a5, $a0, 4
-; LA32-NEXT: st.w $t1, $a0, 8
-; LA32-NEXT: st.w $a1, $a0, 12
+; LA32-NEXT: vmulwod.q.du $vr0, $vr0, $vr1
+; LA32-NEXT: vpickve2gr.w $a1, $vr0, 0
+; LA32-NEXT: vpickve2gr.w $a2, $vr0, 1
+; LA32-NEXT: vpickve2gr.w $a3, $vr0, 2
+; LA32-NEXT: vpickve2gr.w $a4, $vr0, 3
+; LA32-NEXT: st.w $a4, $a0, 12
+; LA32-NEXT: st.w $a3, $a0, 8
+; LA32-NEXT: st.w $a2, $a0, 4
+; LA32-NEXT: st.w $a1, $a0, 0
; LA32-NEXT: ret
;
; LA64-LABEL: vmulwod_q_du:
; LA64: # %bb.0: # %entry
-; LA64-NEXT: ld.d $a1, $a1, 8
-; LA64-NEXT: ld.d $a2, $a2, 8
-; LA64-NEXT: mul.d $a3, $a1, $a2
-; LA64-NEXT: mulh.du $a1, $a1, $a2
-; LA64-NEXT: st.d $a1, $a0, 8
-; LA64-NEXT: st.d $a3, $a0, 0
+; LA64-NEXT: vld $vr0, $a1, 0
+; LA64-NEXT: vld $vr1, $a2, 0
+; LA64-NEXT: vmulwod.q.du $vr0, $vr0, $vr1
+; LA64-NEXT: vst $vr0, $a0, 0
; LA64-NEXT: ret
entry:
%va = load <2 x i64>, ptr %a
@@ -571,57 +447,23 @@ define void @vmulwev_q_du_d(ptr %res, ptr %a, ptr %b) nounwind {
; LA32: # %bb.0: # %entry
; LA32-NEXT: vld $vr0, $a1, 0
; LA32-NEXT: vld $vr1, $a2, 0
-; LA32-NEXT: vpickve2gr.w $a1, $vr0, 1
-; LA32-NEXT: vpickve2gr.w $a2, $vr0, 0
-; LA32-NEXT: vpickve2gr.w $a3, $vr1, 0
-; LA32-NEXT: vpickve2gr.w $a4, $vr1, 1
-; LA32-NEXT: srai.w $a5, $a4, 31
-; LA32-NEXT: mulh.wu $a6, $a2, $a3
-; LA32-NEXT: mul.w $a7, $a1, $a3
-; LA32-NEXT: add.w $a6, $a7, $a6
-; LA32-NEXT: sltu $a7, $a6, $a7
-; LA32-NEXT: mulh.wu $t0, $a1, $a3
-; LA32-NEXT: add.w $a7, $t0, $a7
-; LA32-NEXT: mul.w $t0, $a2, $a4
-; LA32-NEXT: add.w $a6, $t0, $a6
-; LA32-NEXT: sltu $t0, $a6, $t0
-; LA32-NEXT: mulh.wu $t1, $a2, $a4
-; LA32-NEXT: add.w $t0, $t1, $t0
-; LA32-NEXT: add.w $t0, $a7, $t0
-; LA32-NEXT: mul.w $t1, $a1, $a4
-; LA32-NEXT: add.w $t2, $t1, $t0
-; LA32-NEXT: mul.w $t3, $a5, $a2
-; LA32-NEXT: add.w $t4, $t2, $t3
-; LA32-NEXT: sltu $t5, $t4, $t2
-; LA32-NEXT: sltu $t1, $t2, $t1
-; LA32-NEXT: sltu $a7, $t0, $a7
-; LA32-NEXT: mulh.wu $a4, $a1, $a4
-; LA32-NEXT: add.w $a4, $a4, $a7
-; LA32-NEXT: add.w $a4, $a4, $t1
-; LA32-NEXT: mul.w $a1, $a5, $a1
-; LA32-NEXT: mulh.wu $a5, $a5, $a2
-; LA32-NEXT: add.w $a1, $a5, $a1
-; LA32-NEXT: add.w $a1, $a1, $t3
-; LA32-NEXT: add.w $a1, $a4, $a1
-; LA32-NEXT: add.w $a1, $a1, $t5
-; LA32-NEXT: mul.w $a2, $a2, $a3
-; LA32-NEXT: st.w $a2, $a0, 0
-; LA32-NEXT: st.w $a6, $a0, 4
-; LA32-NEXT: st.w $t4, $a0, 8
-; LA32-NEXT: st.w $a1, $a0, 12
+; LA32-NEXT: vmulwev.q.du.d $vr0, $vr0, $vr1
+; LA32-NEXT: vpickve2gr.w $a1, $vr0, 0
+; LA32-NEXT: vpickve2gr.w $a2, $vr0, 1
+; LA32-NEXT: vpickve2gr.w $a3, $vr0, 2
+; LA32-NEXT: vpickve2gr.w $a4, $vr0, 3
+; LA32-NEXT: st.w $a4, $a0, 12
+; LA32-NEXT: st.w $a3, $a0, 8
+; LA32-NEXT: st.w $a2, $a0, 4
+; LA32-NEXT: st.w $a1, $a0, 0
; LA32-NEXT: ret
;
; LA64-LABEL: vmulwev_q_du_d:
; LA64: # %bb.0: # %entry
-; LA64-NEXT: ld.d $a2, $a2, 0
-; LA64-NEXT: ld.d $a1, $a1, 0
-; LA64-NEXT: srai.d $a3, $a2, 63
-; LA64-NEXT: mulh.du $a4, $a1, $a2
-; LA64-NEXT: mul.d $a3, $a1, $a3
-; LA64-NEXT: add.d $a3, $a4, $a3
-; LA64-NEXT: mul.d $a1, $a1, $a2
-; LA64-NEXT: st.d $a1, $a0, 0
-; LA64-NEXT: st.d $a3, $a0, 8
+; LA64-NEXT: vld $vr0, $a1, 0
+; LA64-NEXT: vld $vr1, $a2, 0
+; LA64-NEXT: vmulwev.q.du.d $vr0, $vr0, $vr1
+; LA64-NEXT: vst $vr0, $a0, 0
; LA64-NEXT: ret
entry:
%va = load <2 x i64>, ptr %a
@@ -700,57 +542,23 @@ define void @vmulwod_q_du_d(ptr %res, ptr %a, ptr %b) nounwind {
; LA32: # %bb.0: # %entry
; LA32-NEXT: vld $vr0, $a1, 0
; LA32-NEXT: vld $vr1, $a2, 0
-; LA32-NEXT: vpickve2gr.w $a1, $vr0, 3
-; LA32-NEXT: vpickve2gr.w $a2, $vr0, 2
-; LA32-NEXT: vpickve2gr.w $a3, $vr1, 2
-; LA32-NEXT: vpickve2gr.w $a4, $vr1, 3
-; LA32-NEXT: srai.w $a5, $a4, 31
-; LA32-NEXT: mulh.wu $a6, $a2, $a3
-; LA32-NEXT: mul.w $a7, $a1, $a3
-; LA32-NEXT: add.w $a6, $a7, $a6
-; LA32-NEXT: sltu $a7, $a6, $a7
-; LA32-NEXT: mulh.wu $t0, $a1, $a3
-; LA32-NEXT: add.w $a7, $t0, $a7
-; LA32-NEXT: mul.w $t0, $a2, $a4
-; LA32-NEXT: add.w $a6, $t0, $a6
-; LA32-NEXT: sltu $t0, $a6, $t0
-; LA32-NEXT: mulh.wu $t1, $a2, $a4
-; LA32-NEXT: add.w $t0, $t1, $t0
-; LA32-NEXT: add.w $t0, $a7, $t0
-; LA32-NEXT: mul.w $t1, $a1, $a4
-; LA32-NEXT: add.w $t2, $t1, $t0
-; LA32-NEXT: mul.w $t3, $a5, $a2
-; LA32-NEXT: add.w $t4, $t2, $t3
-; LA32-NEXT: sltu $t5, $t4, $t2
-; LA32-NEXT: sltu $t1, $t2, $t1
-; LA32-NEXT: sltu $a7, $t0, $a7
-; LA32-NEXT: mulh.wu $a4, $a1, $a4
-; LA32-NEXT: add.w $a4, $a4, $a7
-; LA32-NEXT: add.w $a4, $a4, $t1
-; LA32-NEXT: mul.w $a1, $a5, $a1
-; LA32-NEXT: mulh.wu $a5, $a5, $a2
-; LA32-NEXT: add.w $a1, $a5, $a1
-; LA32-NEXT: add.w $a1, $a1, $t3
-; LA32-NEXT: add.w $a1, $a4, $a1
-; LA32-NEXT: add.w $a1, $a1, $t5
-; LA32-NEXT: mul.w $a2, $a2, $a3
-; LA32-NEXT: st.w $a2, $a0, 0
-; LA32-NEXT: st.w $a6, $a0, 4
-; LA32-NEXT: st.w $t4, $a0, 8
-; LA32-NEXT: st.w $a1, $a0, 12
+; LA32-NEXT: vmulwod.q.du.d $vr0, $vr0, $vr1
+; LA32-NEXT: vpickve2gr.w $a1, $vr0, 0
+; LA32-NEXT: vpickve2gr.w $a2, $vr0, 1
+; LA32-NEXT: vpickve2gr.w $a3, $vr0, 2
+; LA32-NEXT: vpickve2gr.w $a4, $vr0, 3
+; LA32-NEXT: st.w $a4, $a0, 12
+; LA32-NEXT: st.w $a3, $a0, 8
+; LA32-NEXT: st.w $a2, $a0, 4
+; LA32-NEXT: st.w $a1, $a0, 0
; LA32-NEXT: ret
;
; LA64-LABEL: vmulwod_q_du_d:
; LA64: # %bb.0: # %entry
-; LA64-NEXT: ld.d $a2, $a2, 8
-; LA64-NEXT: ld.d $a1, $a1, 8
-; LA64-NEXT: srai.d $a3, $a2, 63
-; LA64-NEXT: mulh.du $a4, $a1, $a2
-; LA64-NEXT: mul.d $a3, $a1, $a3
-; LA64-NEXT: add.d $a3, $a4, $a3
-; LA64-NEXT: mul.d $a1, $a1, $a2
-; LA64-NEXT: st.d $a1, $a0, 0
-; LA64-NEXT: st.d $a3, $a0, 8
+; LA64-NEXT: vld $vr0, $a1, 0
+; LA64-NEXT: vld $vr1, $a2, 0
+; LA64-NEXT: vmulwod.q.du.d $vr0, $vr0, $vr1
+; LA64-NEXT: vst $vr0, $a0, 0
; LA64-NEXT: ret
entry:
%va = load <2 x i64>, ptr %a
@@ -829,57 +637,23 @@ define void @vmulwev_q_du_d_1(ptr %res, ptr %a, ptr %b) nounwind {
; LA32: # %bb.0: # %entry
; LA32-NEXT: vld $vr0, $a1, 0
; LA32-NEXT: vld $vr1, $a2, 0
+; LA32-NEXT: vmulwev.q.du.d $vr0, $vr1, $vr0
; LA32-NEXT: vpickve2gr.w $a1, $vr0, 0
; LA32-NEXT: vpickve2gr.w $a2, $vr0, 1
-; LA32-NEXT: vpickve2gr.w $a3, $vr1, 1
-; LA32-NEXT: vpickve2gr.w $a4, $vr1, 0
-; LA32-NEXT: srai.w $a5, $a2, 31
-; LA32-NEXT: mulh.wu $a6, $a1, $a4
-; LA32-NEXT: mul.w $a7, $a2, $a4
-; LA32-NEXT: add.w $a6, $a7, $a6
-; LA32-NEXT: sltu $a7, $a6, $a7
-; LA32-NEXT: mulh.wu $t0, $a2, $a4
-; LA32-NEXT: add.w $a7, $t0, $a7
-; LA32-NEXT: mul.w $t0, $a1, $a3
-; LA32-NEXT: add.w $a6, $t0, $a6
-; LA32-NEXT: sltu $t0, $a6, $t0
-; LA32-NEXT: mulh.wu $t1, $a1, $a3
-; LA32-NEXT: add.w $t0, $t1, $t0
-; LA32-NEXT: add.w $t0, $a7, $t0
-; LA32-NEXT: mul.w $t1, $a2, $a3
-; LA32-NEXT: add.w $t2, $t1, $t0
-; LA32-NEXT: mul.w $t3, $a4, $a5
-; LA32-NEXT: add.w $t4, $t2, $t3
-; LA32-NEXT: sltu $t5, $t4, $t2
-; LA32-NEXT: sltu $t1, $t2, $t1
-; LA32-NEXT: sltu $a7, $t0, $a7
-; LA32-NEXT: mulh.wu $a2, $a2, $a3
-; LA32-NEXT: add.w $a2, $a2, $a7
-; LA32-NEXT: add.w $a2, $a2, $t1
-; LA32-NEXT: mulh.wu $a7, $a4, $a5
-; LA32-NEXT: add.w $a7, $a7, $t3
-; LA32-NEXT: mul.w $a3, $a3, $a5
-; LA32-NEXT: add.w $a3, $a7, $a3
-; LA32-NEXT: add.w $a2, $a2, $a3
-; LA32-NEXT: add.w $a2, $a2, $t5
-; LA32-NEXT: mul.w $a1, $a1, $a4
+; LA32-NEXT: vpickve2gr.w $a3, $vr0, 2
+; LA32-NEXT: vpickve2gr.w $a4, $vr0, 3
+; LA32-NEXT: st.w $a4, $a0, 12
+; LA32-NEXT: st.w $a3, $a0, 8
+; LA32-NEXT: st.w $a2, $a0, 4
; LA32-NEXT: st.w $a1, $a0, 0
-; LA32-NEXT: st.w $a6, $a0, 4
-; LA32-NEXT: st.w $t4, $a0, 8
-; LA32-NEXT: st.w $a2, $a0, 12
; LA32-NEXT: ret
;
; LA64-LABEL: vmulwev_q_du_d_1:
; LA64: # %bb.0: # %entry
-; LA64-NEXT: ld.d $a1, $a1, 0
-; LA64-NEXT: ld.d $a2, $a2, 0
-; LA64-NEXT: srai.d $a3, $a1, 63
-; LA64-NEXT: mulh.du $a4, $a1, $a2
-; LA64-NEXT: mul.d $a3, $a3, $a2
-; LA64-NEXT: add.d $a3, $a4, $a3
-; LA64-NEXT: mul.d $a1, $a1, $a2
-; LA64-NEXT: st.d $a1, $a0, 0
-; LA64-NEXT: st.d $a3, $a0, 8
+; LA64-NEXT: vld $vr0, $a1, 0
+; LA64-NEXT: vld $vr1, $a2, 0
+; LA64-NEXT: vmulwev.q.du.d $vr0, $vr1, $vr0
+; LA64-NEXT: vst $vr0, $a0, 0
; LA64-NEXT: ret
entry:
%va = load <2 x i64>, ptr %a
@@ -958,57 +732,23 @@ define void @vmulwod_q_du_d_1(ptr %res, ptr %a, ptr %b) nounwind {
; LA32: # %bb.0: # %entry
; LA32-NEXT: vld $vr0, $a1, 0
; LA32-NEXT: vld $vr1, $a2, 0
-; LA32-NEXT: vpickve2gr.w $a1, $vr0, 2
-; LA32-NEXT: vpickve2gr.w $a2, $vr0, 3
-; LA32-NEXT: vpickve2gr.w $a3, $vr1, 3
-; LA32-NEXT: vpickve2gr.w $a4, $vr1, 2
-; LA32-NEXT: srai.w $a5, $a2, 31
-; LA32-NEXT: mulh.wu $a6, $a1, $a4
-; LA32-NEXT: mul.w $a7, $a2, $a4
-; LA32-NEXT: add.w $a6, $a7, $a6
-; LA32-NEXT: sltu $a7, $a6, $a7
-; LA32-NEXT: mulh.wu $t0, $a2, $a4
-; LA32-NEXT: add.w $a7, $t0, $a7
-; LA32-NEXT: mul.w $t0, $a1, $a3
-; LA32-NEXT: add.w $a6, $t0, $a6
-; LA32-NEXT: sltu $t0, $a6, $t0
-; LA32-NEXT: mulh.wu $t1, $a1, $a3
-; LA32-NEXT: add.w $t0, $t1, $t0
-; LA32-NEXT: add.w $t0, $a7, $t0
-; LA32-NEXT: mul.w $t1, $a2, $a3
-; LA32-NEXT: add.w $t2, $t1, $t0
-; LA32-NEXT: mul.w $t3, $a4, $a5
-; LA32-NEXT: add.w $t4, $t2, $t3
-; LA32-NEXT: sltu $t5, $t4, $t2
-; LA32-NEXT: sltu $t1, $t2, $t1
-; LA32-NEXT: sltu $a7, $t0, $a7
-; LA32-NEXT: mulh.wu $a2, $a2, $a3
-; LA32-NEXT: add.w $a2, $a2, $a7
-; LA32-NEXT: add.w $a2, $a2, $t1
-; LA32-NEXT: mulh.wu $a7, $a4, $a5
-; LA32-NEXT: add.w $a7, $a7, $t3
-; LA32-NEXT: mul.w $a3, $a3, $a5
-; LA32-NEXT: add.w $a3, $a7, $a3
-; LA32-NEXT: add.w $a2, $a2, $a3
-; LA32-NEXT: add.w $a2, $a2, $t5
-; LA32-NEXT: mul.w $a1, $a1, $a4
+; LA32-NEXT: vmulwod.q.du.d $vr0, $vr1, $vr0
+; LA32-NEXT: vpickve2gr.w $a1, $vr0, 0
+; LA32-NEXT: vpickve2gr.w $a2, $vr0, 1
+; LA32-NEXT: vpickve2gr.w $a3, $vr0, 2
+; LA32-NEXT: vpickve2gr.w $a4, $vr0, 3
+; LA32-NEXT: st.w $a4, $a0, 12
+; LA32-NEXT: st.w $a3, $a0, 8
+; LA32-NEXT: st.w $a2, $a0, 4
; LA32-NEXT: st.w $a1, $a0, 0
-; LA32-NEXT: st.w $a6, $a0, 4
-; LA32-NEXT: st.w $t4, $a0, 8
-; LA32-NEXT: st.w $a2, $a0, 12
; LA32-NEXT: ret
;
; LA64-LABEL: vmulwod_q_du_d_1:
; LA64: # %bb.0: # %entry
-; LA64-NEXT: ld.d $a1, $a1, 8
-; LA64-NEXT: ld.d $a2, $a2, 8
-; LA64-NEXT: srai.d $a3, $a1, 63
-; LA64-NEXT: mulh.du $a4, $a1, $a2
-; LA64-NEXT: mul.d $a3, $a3, $a2
-; LA64-NEXT: add.d $a3, $a4, $a3
-; LA64-NEXT: mul.d $a1, $a1, $a2
-; LA64-NEXT: st.d $a1, $a0, 0
-; LA64-NEXT: st.d $a3, $a0, 8
+; LA64-NEXT: vld $vr0, $a1, 0
+; LA64-NEXT: vld $vr1, $a2, 0
+; LA64-NEXT: vmulwod.q.du.d $vr0, $vr1, $vr0
+; LA64-NEXT: vst $vr0, $a0, 0
; LA64-NEXT: ret
entry:
%va = load <2 x i64>, ptr %a
>From ba301293819ffa3375848acdb727c590a3c69ae6 Mon Sep 17 00:00:00 2001
From: Qi Zhao <zhaoqi01 at loongson.cn>
Date: Thu, 9 Oct 2025 17:21:23 +0800
Subject: [PATCH 3/3] including v2i128
---
.../LoongArch/LoongArchISelLowering.cpp | 17 +-
.../lasx/ir-instruction/mulwev_od.ll | 928 ++----------------
2 files changed, 71 insertions(+), 874 deletions(-)
diff --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
index c6c4f62c29826..cec3bab30b0fe 100644
--- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
@@ -8900,7 +8900,8 @@ static SDValue performVSELECTCombine(SDNode *N, SelectionDAG &DAG,
}
static SDValue performMULCombine(SDNode *N, SelectionDAG &DAG,
- TargetLowering::DAGCombinerInfo &DCI) {
+ TargetLowering::DAGCombinerInfo &DCI,
+ const LoongArchSubtarget &Subtarget) {
if (!DCI.isBeforeLegalize())
return SDValue();
@@ -8909,9 +8910,17 @@ static SDValue performMULCombine(SDNode *N, SelectionDAG &DAG,
SDValue N0 = N->getOperand(0);
SDValue N1 = N->getOperand(1);
+ // Note: v2i128 is an unsupported MVT vector type (see
+ // MachineValueType.h::getVectorVT()), use NumElements and SizeInBits to
+ // identify it.
+ bool HasLSXOnly = Subtarget.hasExtLSX() && !Subtarget.hasExtLASX();
+ bool Isv2i128 = ResTy.isVector() && ResTy.getVectorNumElements() == 2 &&
+ ResTy.getScalarSizeInBits() == 128;
if (ResTy != MVT::v8i16 && ResTy != MVT::v4i32 && ResTy != MVT::v2i64 &&
- ResTy != MVT::v16i16 && ResTy != MVT::v8i32 && ResTy != MVT::v4i64 &&
- ResTy != MVT::i128)
+ ResTy != MVT::i128 && ResTy != MVT::v16i16 && ResTy != MVT::v8i32 &&
+ ResTy != MVT::v4i64 && !Isv2i128)
+ return SDValue();
+ if (HasLSXOnly && (ResTy.is256BitVector() || Isv2i128))
return SDValue();
// Combine:
@@ -9089,7 +9098,7 @@ SDValue LoongArchTargetLowering::PerformDAGCombine(SDNode *N,
return Result;
break;
case ISD::MUL:
- return performMULCombine(N, DAG, DCI);
+ return performMULCombine(N, DAG, DCI, Subtarget);
}
return SDValue();
}
diff --git a/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/mulwev_od.ll b/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/mulwev_od.ll
index 605325f4dc4f4..ed3a31d12ee83 100644
--- a/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/mulwev_od.ll
+++ b/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/mulwev_od.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s --check-prefixes=CHECK,LA32
-; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s --check-prefixes=CHECK,LA64
+; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s
+; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s
define void @vmulwev_h_b(ptr %res, ptr %a, ptr %b) nounwind {
; CHECK-LABEL: vmulwev_h_b:
@@ -63,139 +63,13 @@ entry:
}
define void @vmulwev_q_d(ptr %res, ptr %a, ptr %b) nounwind {
-; LA32-LABEL: vmulwev_q_d:
-; LA32: # %bb.0: # %entry
-; LA32-NEXT: addi.w $sp, $sp, -32
-; LA32-NEXT: st.w $fp, $sp, 28 # 4-byte Folded Spill
-; LA32-NEXT: st.w $s0, $sp, 24 # 4-byte Folded Spill
-; LA32-NEXT: st.w $s1, $sp, 20 # 4-byte Folded Spill
-; LA32-NEXT: st.w $s2, $sp, 16 # 4-byte Folded Spill
-; LA32-NEXT: st.w $s3, $sp, 12 # 4-byte Folded Spill
-; LA32-NEXT: st.w $s4, $sp, 8 # 4-byte Folded Spill
-; LA32-NEXT: xvld $xr0, $a1, 0
-; LA32-NEXT: xvpickve2gr.w $a1, $xr0, 4
-; LA32-NEXT: xvld $xr1, $a2, 0
-; LA32-NEXT: xvpickve2gr.w $a2, $xr0, 0
-; LA32-NEXT: xvpickve2gr.w $t3, $xr0, 1
-; LA32-NEXT: xvpickve2gr.w $a5, $xr0, 5
-; LA32-NEXT: xvpickve2gr.w $a3, $xr1, 4
-; LA32-NEXT: xvpickve2gr.w $a4, $xr1, 0
-; LA32-NEXT: xvpickve2gr.w $t4, $xr1, 1
-; LA32-NEXT: xvpickve2gr.w $a7, $xr1, 5
-; LA32-NEXT: srai.w $t1, $a5, 31
-; LA32-NEXT: srai.w $t5, $t3, 31
-; LA32-NEXT: srai.w $t0, $a7, 31
-; LA32-NEXT: srai.w $t6, $t4, 31
-; LA32-NEXT: mulh.wu $a6, $a2, $a4
-; LA32-NEXT: mul.w $t2, $t3, $a4
-; LA32-NEXT: add.w $a6, $t2, $a6
-; LA32-NEXT: sltu $t2, $a6, $t2
-; LA32-NEXT: mulh.wu $t7, $t3, $a4
-; LA32-NEXT: add.w $t7, $t7, $t2
-; LA32-NEXT: mul.w $t2, $a2, $t4
-; LA32-NEXT: add.w $a6, $t2, $a6
-; LA32-NEXT: sltu $t2, $a6, $t2
-; LA32-NEXT: mulh.wu $t8, $a2, $t4
-; LA32-NEXT: add.w $t2, $t8, $t2
-; LA32-NEXT: add.w $t8, $t7, $t2
-; LA32-NEXT: mul.w $fp, $t3, $t4
-; LA32-NEXT: add.w $s0, $fp, $t8
-; LA32-NEXT: mul.w $s1, $a4, $t5
-; LA32-NEXT: mul.w $s2, $t6, $a2
-; LA32-NEXT: add.w $s3, $s2, $s1
-; LA32-NEXT: add.w $t2, $s0, $s3
-; LA32-NEXT: sltu $s4, $t2, $s0
-; LA32-NEXT: sltu $fp, $s0, $fp
-; LA32-NEXT: sltu $t7, $t8, $t7
-; LA32-NEXT: mulh.wu $t8, $t3, $t4
-; LA32-NEXT: add.w $t7, $t8, $t7
-; LA32-NEXT: add.w $t7, $t7, $fp
-; LA32-NEXT: mulh.wu $t8, $a4, $t5
-; LA32-NEXT: add.w $t8, $t8, $s1
-; LA32-NEXT: mul.w $t4, $t4, $t5
-; LA32-NEXT: add.w $t4, $t8, $t4
-; LA32-NEXT: mul.w $t3, $t6, $t3
-; LA32-NEXT: mulh.wu $t5, $t6, $a2
-; LA32-NEXT: add.w $t3, $t5, $t3
-; LA32-NEXT: add.w $t3, $t3, $s2
-; LA32-NEXT: add.w $t3, $t3, $t4
-; LA32-NEXT: sltu $t4, $s3, $s2
-; LA32-NEXT: add.w $t3, $t3, $t4
-; LA32-NEXT: add.w $t3, $t7, $t3
-; LA32-NEXT: add.w $t3, $t3, $s4
-; LA32-NEXT: mulh.wu $t4, $a1, $a3
-; LA32-NEXT: mul.w $t5, $a5, $a3
-; LA32-NEXT: add.w $t4, $t5, $t4
-; LA32-NEXT: sltu $t5, $t4, $t5
-; LA32-NEXT: mulh.wu $t6, $a5, $a3
-; LA32-NEXT: add.w $t5, $t6, $t5
-; LA32-NEXT: mul.w $t6, $a1, $a7
-; LA32-NEXT: add.w $t4, $t6, $t4
-; LA32-NEXT: sltu $t6, $t4, $t6
-; LA32-NEXT: mulh.wu $t7, $a1, $a7
-; LA32-NEXT: add.w $t6, $t7, $t6
-; LA32-NEXT: add.w $t6, $t5, $t6
-; LA32-NEXT: mul.w $t7, $a5, $a7
-; LA32-NEXT: add.w $t8, $t7, $t6
-; LA32-NEXT: mul.w $fp, $a3, $t1
-; LA32-NEXT: mul.w $s0, $t0, $a1
-; LA32-NEXT: add.w $s1, $s0, $fp
-; LA32-NEXT: add.w $s2, $t8, $s1
-; LA32-NEXT: sltu $s3, $s2, $t8
-; LA32-NEXT: sltu $t7, $t8, $t7
-; LA32-NEXT: sltu $t5, $t6, $t5
-; LA32-NEXT: mulh.wu $t6, $a5, $a7
-; LA32-NEXT: add.w $t5, $t6, $t5
-; LA32-NEXT: add.w $t5, $t5, $t7
-; LA32-NEXT: mulh.wu $t6, $a3, $t1
-; LA32-NEXT: add.w $t6, $t6, $fp
-; LA32-NEXT: mul.w $a7, $a7, $t1
-; LA32-NEXT: add.w $a7, $t6, $a7
-; LA32-NEXT: mul.w $a5, $t0, $a5
-; LA32-NEXT: mulh.wu $t0, $t0, $a1
-; LA32-NEXT: add.w $a5, $t0, $a5
-; LA32-NEXT: add.w $a5, $a5, $s0
-; LA32-NEXT: add.w $a5, $a5, $a7
-; LA32-NEXT: sltu $a7, $s1, $s0
-; LA32-NEXT: add.w $a5, $a5, $a7
-; LA32-NEXT: add.w $a5, $t5, $a5
-; LA32-NEXT: add.w $a5, $a5, $s3
-; LA32-NEXT: mul.w $a2, $a2, $a4
-; LA32-NEXT: mul.w $a1, $a1, $a3
-; LA32-NEXT: st.w $a1, $a0, 16
-; LA32-NEXT: st.w $a2, $a0, 0
-; LA32-NEXT: st.w $t4, $a0, 20
-; LA32-NEXT: st.w $a6, $a0, 4
-; LA32-NEXT: st.w $s2, $a0, 24
-; LA32-NEXT: st.w $t2, $a0, 8
-; LA32-NEXT: st.w $a5, $a0, 28
-; LA32-NEXT: st.w $t3, $a0, 12
-; LA32-NEXT: ld.w $s4, $sp, 8 # 4-byte Folded Reload
-; LA32-NEXT: ld.w $s3, $sp, 12 # 4-byte Folded Reload
-; LA32-NEXT: ld.w $s2, $sp, 16 # 4-byte Folded Reload
-; LA32-NEXT: ld.w $s1, $sp, 20 # 4-byte Folded Reload
-; LA32-NEXT: ld.w $s0, $sp, 24 # 4-byte Folded Reload
-; LA32-NEXT: ld.w $fp, $sp, 28 # 4-byte Folded Reload
-; LA32-NEXT: addi.w $sp, $sp, 32
-; LA32-NEXT: ret
-;
-; LA64-LABEL: vmulwev_q_d:
-; LA64: # %bb.0: # %entry
-; LA64-NEXT: xvld $xr0, $a1, 0
-; LA64-NEXT: xvld $xr1, $a2, 0
-; LA64-NEXT: xvpickve2gr.d $a1, $xr0, 2
-; LA64-NEXT: xvpickve2gr.d $a2, $xr0, 0
-; LA64-NEXT: xvpickve2gr.d $a3, $xr1, 2
-; LA64-NEXT: xvpickve2gr.d $a4, $xr1, 0
-; LA64-NEXT: mul.d $a5, $a2, $a4
-; LA64-NEXT: mulh.d $a2, $a2, $a4
-; LA64-NEXT: mul.d $a4, $a1, $a3
-; LA64-NEXT: mulh.d $a1, $a1, $a3
-; LA64-NEXT: st.d $a1, $a0, 24
-; LA64-NEXT: st.d $a4, $a0, 16
-; LA64-NEXT: st.d $a2, $a0, 8
-; LA64-NEXT: st.d $a5, $a0, 0
-; LA64-NEXT: ret
+; CHECK-LABEL: vmulwev_q_d:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xvld $xr0, $a1, 0
+; CHECK-NEXT: xvld $xr1, $a2, 0
+; CHECK-NEXT: xvmulwev.q.d $xr0, $xr0, $xr1
+; CHECK-NEXT: xvst $xr0, $a0, 0
+; CHECK-NEXT: ret
entry:
%va = load <4 x i64>, ptr %a
%vb = load <4 x i64>, ptr %b
@@ -269,139 +143,13 @@ entry:
}
define void @vmulwod_q_d(ptr %res, ptr %a, ptr %b) nounwind {
-; LA32-LABEL: vmulwod_q_d:
-; LA32: # %bb.0: # %entry
-; LA32-NEXT: addi.w $sp, $sp, -32
-; LA32-NEXT: st.w $fp, $sp, 28 # 4-byte Folded Spill
-; LA32-NEXT: st.w $s0, $sp, 24 # 4-byte Folded Spill
-; LA32-NEXT: st.w $s1, $sp, 20 # 4-byte Folded Spill
-; LA32-NEXT: st.w $s2, $sp, 16 # 4-byte Folded Spill
-; LA32-NEXT: st.w $s3, $sp, 12 # 4-byte Folded Spill
-; LA32-NEXT: st.w $s4, $sp, 8 # 4-byte Folded Spill
-; LA32-NEXT: xvld $xr0, $a1, 0
-; LA32-NEXT: xvpickve2gr.w $a1, $xr0, 6
-; LA32-NEXT: xvld $xr1, $a2, 0
-; LA32-NEXT: xvpickve2gr.w $a2, $xr0, 2
-; LA32-NEXT: xvpickve2gr.w $t3, $xr0, 3
-; LA32-NEXT: xvpickve2gr.w $a5, $xr0, 7
-; LA32-NEXT: xvpickve2gr.w $a3, $xr1, 6
-; LA32-NEXT: xvpickve2gr.w $a4, $xr1, 2
-; LA32-NEXT: xvpickve2gr.w $t4, $xr1, 3
-; LA32-NEXT: xvpickve2gr.w $a7, $xr1, 7
-; LA32-NEXT: srai.w $t1, $a5, 31
-; LA32-NEXT: srai.w $t5, $t3, 31
-; LA32-NEXT: srai.w $t0, $a7, 31
-; LA32-NEXT: srai.w $t6, $t4, 31
-; LA32-NEXT: mulh.wu $a6, $a2, $a4
-; LA32-NEXT: mul.w $t2, $t3, $a4
-; LA32-NEXT: add.w $a6, $t2, $a6
-; LA32-NEXT: sltu $t2, $a6, $t2
-; LA32-NEXT: mulh.wu $t7, $t3, $a4
-; LA32-NEXT: add.w $t7, $t7, $t2
-; LA32-NEXT: mul.w $t2, $a2, $t4
-; LA32-NEXT: add.w $a6, $t2, $a6
-; LA32-NEXT: sltu $t2, $a6, $t2
-; LA32-NEXT: mulh.wu $t8, $a2, $t4
-; LA32-NEXT: add.w $t2, $t8, $t2
-; LA32-NEXT: add.w $t8, $t7, $t2
-; LA32-NEXT: mul.w $fp, $t3, $t4
-; LA32-NEXT: add.w $s0, $fp, $t8
-; LA32-NEXT: mul.w $s1, $a4, $t5
-; LA32-NEXT: mul.w $s2, $t6, $a2
-; LA32-NEXT: add.w $s3, $s2, $s1
-; LA32-NEXT: add.w $t2, $s0, $s3
-; LA32-NEXT: sltu $s4, $t2, $s0
-; LA32-NEXT: sltu $fp, $s0, $fp
-; LA32-NEXT: sltu $t7, $t8, $t7
-; LA32-NEXT: mulh.wu $t8, $t3, $t4
-; LA32-NEXT: add.w $t7, $t8, $t7
-; LA32-NEXT: add.w $t7, $t7, $fp
-; LA32-NEXT: mulh.wu $t8, $a4, $t5
-; LA32-NEXT: add.w $t8, $t8, $s1
-; LA32-NEXT: mul.w $t4, $t4, $t5
-; LA32-NEXT: add.w $t4, $t8, $t4
-; LA32-NEXT: mul.w $t3, $t6, $t3
-; LA32-NEXT: mulh.wu $t5, $t6, $a2
-; LA32-NEXT: add.w $t3, $t5, $t3
-; LA32-NEXT: add.w $t3, $t3, $s2
-; LA32-NEXT: add.w $t3, $t3, $t4
-; LA32-NEXT: sltu $t4, $s3, $s2
-; LA32-NEXT: add.w $t3, $t3, $t4
-; LA32-NEXT: add.w $t3, $t7, $t3
-; LA32-NEXT: add.w $t3, $t3, $s4
-; LA32-NEXT: mulh.wu $t4, $a1, $a3
-; LA32-NEXT: mul.w $t5, $a5, $a3
-; LA32-NEXT: add.w $t4, $t5, $t4
-; LA32-NEXT: sltu $t5, $t4, $t5
-; LA32-NEXT: mulh.wu $t6, $a5, $a3
-; LA32-NEXT: add.w $t5, $t6, $t5
-; LA32-NEXT: mul.w $t6, $a1, $a7
-; LA32-NEXT: add.w $t4, $t6, $t4
-; LA32-NEXT: sltu $t6, $t4, $t6
-; LA32-NEXT: mulh.wu $t7, $a1, $a7
-; LA32-NEXT: add.w $t6, $t7, $t6
-; LA32-NEXT: add.w $t6, $t5, $t6
-; LA32-NEXT: mul.w $t7, $a5, $a7
-; LA32-NEXT: add.w $t8, $t7, $t6
-; LA32-NEXT: mul.w $fp, $a3, $t1
-; LA32-NEXT: mul.w $s0, $t0, $a1
-; LA32-NEXT: add.w $s1, $s0, $fp
-; LA32-NEXT: add.w $s2, $t8, $s1
-; LA32-NEXT: sltu $s3, $s2, $t8
-; LA32-NEXT: sltu $t7, $t8, $t7
-; LA32-NEXT: sltu $t5, $t6, $t5
-; LA32-NEXT: mulh.wu $t6, $a5, $a7
-; LA32-NEXT: add.w $t5, $t6, $t5
-; LA32-NEXT: add.w $t5, $t5, $t7
-; LA32-NEXT: mulh.wu $t6, $a3, $t1
-; LA32-NEXT: add.w $t6, $t6, $fp
-; LA32-NEXT: mul.w $a7, $a7, $t1
-; LA32-NEXT: add.w $a7, $t6, $a7
-; LA32-NEXT: mul.w $a5, $t0, $a5
-; LA32-NEXT: mulh.wu $t0, $t0, $a1
-; LA32-NEXT: add.w $a5, $t0, $a5
-; LA32-NEXT: add.w $a5, $a5, $s0
-; LA32-NEXT: add.w $a5, $a5, $a7
-; LA32-NEXT: sltu $a7, $s1, $s0
-; LA32-NEXT: add.w $a5, $a5, $a7
-; LA32-NEXT: add.w $a5, $t5, $a5
-; LA32-NEXT: add.w $a5, $a5, $s3
-; LA32-NEXT: mul.w $a2, $a2, $a4
-; LA32-NEXT: mul.w $a1, $a1, $a3
-; LA32-NEXT: st.w $a1, $a0, 16
-; LA32-NEXT: st.w $a2, $a0, 0
-; LA32-NEXT: st.w $t4, $a0, 20
-; LA32-NEXT: st.w $a6, $a0, 4
-; LA32-NEXT: st.w $s2, $a0, 24
-; LA32-NEXT: st.w $t2, $a0, 8
-; LA32-NEXT: st.w $a5, $a0, 28
-; LA32-NEXT: st.w $t3, $a0, 12
-; LA32-NEXT: ld.w $s4, $sp, 8 # 4-byte Folded Reload
-; LA32-NEXT: ld.w $s3, $sp, 12 # 4-byte Folded Reload
-; LA32-NEXT: ld.w $s2, $sp, 16 # 4-byte Folded Reload
-; LA32-NEXT: ld.w $s1, $sp, 20 # 4-byte Folded Reload
-; LA32-NEXT: ld.w $s0, $sp, 24 # 4-byte Folded Reload
-; LA32-NEXT: ld.w $fp, $sp, 28 # 4-byte Folded Reload
-; LA32-NEXT: addi.w $sp, $sp, 32
-; LA32-NEXT: ret
-;
-; LA64-LABEL: vmulwod_q_d:
-; LA64: # %bb.0: # %entry
-; LA64-NEXT: xvld $xr0, $a1, 0
-; LA64-NEXT: xvld $xr1, $a2, 0
-; LA64-NEXT: xvpickve2gr.d $a1, $xr0, 3
-; LA64-NEXT: xvpickve2gr.d $a2, $xr0, 1
-; LA64-NEXT: xvpickve2gr.d $a3, $xr1, 3
-; LA64-NEXT: xvpickve2gr.d $a4, $xr1, 1
-; LA64-NEXT: mul.d $a5, $a2, $a4
-; LA64-NEXT: mulh.d $a2, $a2, $a4
-; LA64-NEXT: mul.d $a4, $a1, $a3
-; LA64-NEXT: mulh.d $a1, $a1, $a3
-; LA64-NEXT: st.d $a1, $a0, 24
-; LA64-NEXT: st.d $a4, $a0, 16
-; LA64-NEXT: st.d $a2, $a0, 8
-; LA64-NEXT: st.d $a5, $a0, 0
-; LA64-NEXT: ret
+; CHECK-LABEL: vmulwod_q_d:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xvld $xr0, $a1, 0
+; CHECK-NEXT: xvld $xr1, $a2, 0
+; CHECK-NEXT: xvmulwod.q.d $xr0, $xr0, $xr1
+; CHECK-NEXT: xvst $xr0, $a0, 0
+; CHECK-NEXT: ret
entry:
%va = load <4 x i64>, ptr %a
%vb = load <4 x i64>, ptr %b
@@ -475,85 +223,13 @@ entry:
}
define void @vmulwev_q_du(ptr %res, ptr %a, ptr %b) nounwind {
-; LA32-LABEL: vmulwev_q_du:
-; LA32: # %bb.0: # %entry
-; LA32-NEXT: xvld $xr0, $a1, 0
-; LA32-NEXT: xvpickve2gr.w $a1, $xr0, 5
-; LA32-NEXT: xvld $xr1, $a2, 0
-; LA32-NEXT: xvpickve2gr.w $a2, $xr0, 4
-; LA32-NEXT: xvpickve2gr.w $a3, $xr0, 1
-; LA32-NEXT: xvpickve2gr.w $a4, $xr0, 0
-; LA32-NEXT: xvpickve2gr.w $a5, $xr1, 5
-; LA32-NEXT: xvpickve2gr.w $a6, $xr1, 4
-; LA32-NEXT: xvpickve2gr.w $a7, $xr1, 1
-; LA32-NEXT: xvpickve2gr.w $t0, $xr1, 0
-; LA32-NEXT: mulh.wu $t1, $a4, $t0
-; LA32-NEXT: mul.w $t2, $a3, $t0
-; LA32-NEXT: add.w $t1, $t2, $t1
-; LA32-NEXT: sltu $t2, $t1, $t2
-; LA32-NEXT: mulh.wu $t3, $a3, $t0
-; LA32-NEXT: add.w $t2, $t3, $t2
-; LA32-NEXT: mul.w $t3, $a4, $a7
-; LA32-NEXT: add.w $t1, $t3, $t1
-; LA32-NEXT: sltu $t3, $t1, $t3
-; LA32-NEXT: mulh.wu $t4, $a4, $a7
-; LA32-NEXT: add.w $t3, $t4, $t3
-; LA32-NEXT: add.w $t3, $t2, $t3
-; LA32-NEXT: mul.w $t4, $a3, $a7
-; LA32-NEXT: add.w $t5, $t4, $t3
-; LA32-NEXT: sltu $t4, $t5, $t4
-; LA32-NEXT: sltu $t2, $t3, $t2
-; LA32-NEXT: mulh.wu $a3, $a3, $a7
-; LA32-NEXT: add.w $a3, $a3, $t2
-; LA32-NEXT: add.w $a3, $a3, $t4
-; LA32-NEXT: mulh.wu $a7, $a2, $a6
-; LA32-NEXT: mul.w $t2, $a1, $a6
-; LA32-NEXT: add.w $a7, $t2, $a7
-; LA32-NEXT: sltu $t2, $a7, $t2
-; LA32-NEXT: mulh.wu $t3, $a1, $a6
-; LA32-NEXT: add.w $t2, $t3, $t2
-; LA32-NEXT: mul.w $t3, $a2, $a5
-; LA32-NEXT: add.w $a7, $t3, $a7
-; LA32-NEXT: sltu $t3, $a7, $t3
-; LA32-NEXT: mulh.wu $t4, $a2, $a5
-; LA32-NEXT: add.w $t3, $t4, $t3
-; LA32-NEXT: add.w $t3, $t2, $t3
-; LA32-NEXT: mul.w $t4, $a1, $a5
-; LA32-NEXT: add.w $t6, $t4, $t3
-; LA32-NEXT: sltu $t4, $t6, $t4
-; LA32-NEXT: sltu $t2, $t3, $t2
-; LA32-NEXT: mulh.wu $a1, $a1, $a5
-; LA32-NEXT: add.w $a1, $a1, $t2
-; LA32-NEXT: add.w $a1, $a1, $t4
-; LA32-NEXT: mul.w $a4, $a4, $t0
-; LA32-NEXT: mul.w $a2, $a2, $a6
-; LA32-NEXT: st.w $a2, $a0, 16
-; LA32-NEXT: st.w $a4, $a0, 0
-; LA32-NEXT: st.w $a7, $a0, 20
-; LA32-NEXT: st.w $t1, $a0, 4
-; LA32-NEXT: st.w $t6, $a0, 24
-; LA32-NEXT: st.w $t5, $a0, 8
-; LA32-NEXT: st.w $a1, $a0, 28
-; LA32-NEXT: st.w $a3, $a0, 12
-; LA32-NEXT: ret
-;
-; LA64-LABEL: vmulwev_q_du:
-; LA64: # %bb.0: # %entry
-; LA64-NEXT: xvld $xr0, $a1, 0
-; LA64-NEXT: xvld $xr1, $a2, 0
-; LA64-NEXT: xvpickve2gr.d $a1, $xr0, 2
-; LA64-NEXT: xvpickve2gr.d $a2, $xr0, 0
-; LA64-NEXT: xvpickve2gr.d $a3, $xr1, 2
-; LA64-NEXT: xvpickve2gr.d $a4, $xr1, 0
-; LA64-NEXT: mul.d $a5, $a2, $a4
-; LA64-NEXT: mulh.du $a2, $a2, $a4
-; LA64-NEXT: mul.d $a4, $a1, $a3
-; LA64-NEXT: mulh.du $a1, $a1, $a3
-; LA64-NEXT: st.d $a1, $a0, 24
-; LA64-NEXT: st.d $a4, $a0, 16
-; LA64-NEXT: st.d $a2, $a0, 8
-; LA64-NEXT: st.d $a5, $a0, 0
-; LA64-NEXT: ret
+; CHECK-LABEL: vmulwev_q_du:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xvld $xr0, $a1, 0
+; CHECK-NEXT: xvld $xr1, $a2, 0
+; CHECK-NEXT: xvmulwev.q.du $xr0, $xr0, $xr1
+; CHECK-NEXT: xvst $xr0, $a0, 0
+; CHECK-NEXT: ret
entry:
%va = load <4 x i64>, ptr %a
%vb = load <4 x i64>, ptr %b
@@ -627,85 +303,13 @@ entry:
}
define void @vmulwod_q_du(ptr %res, ptr %a, ptr %b) nounwind {
-; LA32-LABEL: vmulwod_q_du:
-; LA32: # %bb.0: # %entry
-; LA32-NEXT: xvld $xr0, $a1, 0
-; LA32-NEXT: xvpickve2gr.w $a1, $xr0, 7
-; LA32-NEXT: xvld $xr1, $a2, 0
-; LA32-NEXT: xvpickve2gr.w $a2, $xr0, 6
-; LA32-NEXT: xvpickve2gr.w $a3, $xr0, 3
-; LA32-NEXT: xvpickve2gr.w $a4, $xr0, 2
-; LA32-NEXT: xvpickve2gr.w $a5, $xr1, 7
-; LA32-NEXT: xvpickve2gr.w $a6, $xr1, 6
-; LA32-NEXT: xvpickve2gr.w $a7, $xr1, 3
-; LA32-NEXT: xvpickve2gr.w $t0, $xr1, 2
-; LA32-NEXT: mulh.wu $t1, $a4, $t0
-; LA32-NEXT: mul.w $t2, $a3, $t0
-; LA32-NEXT: add.w $t1, $t2, $t1
-; LA32-NEXT: sltu $t2, $t1, $t2
-; LA32-NEXT: mulh.wu $t3, $a3, $t0
-; LA32-NEXT: add.w $t2, $t3, $t2
-; LA32-NEXT: mul.w $t3, $a4, $a7
-; LA32-NEXT: add.w $t1, $t3, $t1
-; LA32-NEXT: sltu $t3, $t1, $t3
-; LA32-NEXT: mulh.wu $t4, $a4, $a7
-; LA32-NEXT: add.w $t3, $t4, $t3
-; LA32-NEXT: add.w $t3, $t2, $t3
-; LA32-NEXT: mul.w $t4, $a3, $a7
-; LA32-NEXT: add.w $t5, $t4, $t3
-; LA32-NEXT: sltu $t4, $t5, $t4
-; LA32-NEXT: sltu $t2, $t3, $t2
-; LA32-NEXT: mulh.wu $a3, $a3, $a7
-; LA32-NEXT: add.w $a3, $a3, $t2
-; LA32-NEXT: add.w $a3, $a3, $t4
-; LA32-NEXT: mulh.wu $a7, $a2, $a6
-; LA32-NEXT: mul.w $t2, $a1, $a6
-; LA32-NEXT: add.w $a7, $t2, $a7
-; LA32-NEXT: sltu $t2, $a7, $t2
-; LA32-NEXT: mulh.wu $t3, $a1, $a6
-; LA32-NEXT: add.w $t2, $t3, $t2
-; LA32-NEXT: mul.w $t3, $a2, $a5
-; LA32-NEXT: add.w $a7, $t3, $a7
-; LA32-NEXT: sltu $t3, $a7, $t3
-; LA32-NEXT: mulh.wu $t4, $a2, $a5
-; LA32-NEXT: add.w $t3, $t4, $t3
-; LA32-NEXT: add.w $t3, $t2, $t3
-; LA32-NEXT: mul.w $t4, $a1, $a5
-; LA32-NEXT: add.w $t6, $t4, $t3
-; LA32-NEXT: sltu $t4, $t6, $t4
-; LA32-NEXT: sltu $t2, $t3, $t2
-; LA32-NEXT: mulh.wu $a1, $a1, $a5
-; LA32-NEXT: add.w $a1, $a1, $t2
-; LA32-NEXT: add.w $a1, $a1, $t4
-; LA32-NEXT: mul.w $a4, $a4, $t0
-; LA32-NEXT: mul.w $a2, $a2, $a6
-; LA32-NEXT: st.w $a2, $a0, 16
-; LA32-NEXT: st.w $a4, $a0, 0
-; LA32-NEXT: st.w $a7, $a0, 20
-; LA32-NEXT: st.w $t1, $a0, 4
-; LA32-NEXT: st.w $t6, $a0, 24
-; LA32-NEXT: st.w $t5, $a0, 8
-; LA32-NEXT: st.w $a1, $a0, 28
-; LA32-NEXT: st.w $a3, $a0, 12
-; LA32-NEXT: ret
-;
-; LA64-LABEL: vmulwod_q_du:
-; LA64: # %bb.0: # %entry
-; LA64-NEXT: xvld $xr0, $a1, 0
-; LA64-NEXT: xvld $xr1, $a2, 0
-; LA64-NEXT: xvpickve2gr.d $a1, $xr0, 3
-; LA64-NEXT: xvpickve2gr.d $a2, $xr0, 1
-; LA64-NEXT: xvpickve2gr.d $a3, $xr1, 3
-; LA64-NEXT: xvpickve2gr.d $a4, $xr1, 1
-; LA64-NEXT: mul.d $a5, $a2, $a4
-; LA64-NEXT: mulh.du $a2, $a2, $a4
-; LA64-NEXT: mul.d $a4, $a1, $a3
-; LA64-NEXT: mulh.du $a1, $a1, $a3
-; LA64-NEXT: st.d $a1, $a0, 24
-; LA64-NEXT: st.d $a4, $a0, 16
-; LA64-NEXT: st.d $a2, $a0, 8
-; LA64-NEXT: st.d $a5, $a0, 0
-; LA64-NEXT: ret
+; CHECK-LABEL: vmulwod_q_du:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xvld $xr0, $a1, 0
+; CHECK-NEXT: xvld $xr1, $a2, 0
+; CHECK-NEXT: xvmulwod.q.du $xr0, $xr0, $xr1
+; CHECK-NEXT: xvst $xr0, $a0, 0
+; CHECK-NEXT: ret
entry:
%va = load <4 x i64>, ptr %a
%vb = load <4 x i64>, ptr %b
@@ -779,117 +383,13 @@ entry:
}
define void @vmulwev_q_du_d(ptr %res, ptr %a, ptr %b) nounwind {
-; LA32-LABEL: vmulwev_q_du_d:
-; LA32: # %bb.0: # %entry
-; LA32-NEXT: addi.w $sp, $sp, -16
-; LA32-NEXT: st.w $fp, $sp, 12 # 4-byte Folded Spill
-; LA32-NEXT: st.w $s0, $sp, 8 # 4-byte Folded Spill
-; LA32-NEXT: xvld $xr0, $a1, 0
-; LA32-NEXT: xvpickve2gr.w $a3, $xr0, 5
-; LA32-NEXT: xvld $xr1, $a2, 0
-; LA32-NEXT: xvpickve2gr.w $a1, $xr0, 4
-; LA32-NEXT: xvpickve2gr.w $a6, $xr0, 1
-; LA32-NEXT: xvpickve2gr.w $a2, $xr0, 0
-; LA32-NEXT: xvpickve2gr.w $a4, $xr1, 4
-; LA32-NEXT: xvpickve2gr.w $a5, $xr1, 0
-; LA32-NEXT: xvpickve2gr.w $a7, $xr1, 1
-; LA32-NEXT: xvpickve2gr.w $t0, $xr1, 5
-; LA32-NEXT: srai.w $t1, $t0, 31
-; LA32-NEXT: srai.w $t2, $a7, 31
-; LA32-NEXT: mulh.wu $t3, $a2, $a5
-; LA32-NEXT: mul.w $t4, $a6, $a5
-; LA32-NEXT: add.w $t3, $t4, $t3
-; LA32-NEXT: sltu $t4, $t3, $t4
-; LA32-NEXT: mulh.wu $t5, $a6, $a5
-; LA32-NEXT: add.w $t4, $t5, $t4
-; LA32-NEXT: mul.w $t5, $a2, $a7
-; LA32-NEXT: add.w $t3, $t5, $t3
-; LA32-NEXT: sltu $t5, $t3, $t5
-; LA32-NEXT: mulh.wu $t6, $a2, $a7
-; LA32-NEXT: add.w $t5, $t6, $t5
-; LA32-NEXT: add.w $t5, $t4, $t5
-; LA32-NEXT: mul.w $t6, $a6, $a7
-; LA32-NEXT: add.w $t7, $t6, $t5
-; LA32-NEXT: mul.w $t8, $t2, $a2
-; LA32-NEXT: add.w $fp, $t7, $t8
-; LA32-NEXT: sltu $s0, $fp, $t7
-; LA32-NEXT: sltu $t6, $t7, $t6
-; LA32-NEXT: sltu $t4, $t5, $t4
-; LA32-NEXT: mulh.wu $a7, $a6, $a7
-; LA32-NEXT: add.w $a7, $a7, $t4
-; LA32-NEXT: add.w $a7, $a7, $t6
-; LA32-NEXT: mul.w $a6, $t2, $a6
-; LA32-NEXT: mulh.wu $t2, $t2, $a2
-; LA32-NEXT: add.w $a6, $t2, $a6
-; LA32-NEXT: add.w $a6, $a6, $t8
-; LA32-NEXT: add.w $a6, $a7, $a6
-; LA32-NEXT: add.w $a6, $a6, $s0
-; LA32-NEXT: mulh.wu $a7, $a1, $a4
-; LA32-NEXT: mul.w $t2, $a3, $a4
-; LA32-NEXT: add.w $a7, $t2, $a7
-; LA32-NEXT: sltu $t2, $a7, $t2
-; LA32-NEXT: mulh.wu $t4, $a3, $a4
-; LA32-NEXT: add.w $t2, $t4, $t2
-; LA32-NEXT: mul.w $t4, $a1, $t0
-; LA32-NEXT: add.w $a7, $t4, $a7
-; LA32-NEXT: sltu $t4, $a7, $t4
-; LA32-NEXT: mulh.wu $t5, $a1, $t0
-; LA32-NEXT: add.w $t4, $t5, $t4
-; LA32-NEXT: add.w $t4, $t2, $t4
-; LA32-NEXT: mul.w $t5, $a3, $t0
-; LA32-NEXT: add.w $t6, $t5, $t4
-; LA32-NEXT: mul.w $t7, $t1, $a1
-; LA32-NEXT: add.w $t8, $t6, $t7
-; LA32-NEXT: sltu $s0, $t8, $t6
-; LA32-NEXT: sltu $t5, $t6, $t5
-; LA32-NEXT: sltu $t2, $t4, $t2
-; LA32-NEXT: mulh.wu $t0, $a3, $t0
-; LA32-NEXT: add.w $t0, $t0, $t2
-; LA32-NEXT: add.w $t0, $t0, $t5
-; LA32-NEXT: mul.w $a3, $t1, $a3
-; LA32-NEXT: mulh.wu $t1, $t1, $a1
-; LA32-NEXT: add.w $a3, $t1, $a3
-; LA32-NEXT: add.w $a3, $a3, $t7
-; LA32-NEXT: add.w $a3, $t0, $a3
-; LA32-NEXT: add.w $a3, $a3, $s0
-; LA32-NEXT: mul.w $a2, $a2, $a5
-; LA32-NEXT: mul.w $a1, $a1, $a4
-; LA32-NEXT: st.w $a1, $a0, 16
-; LA32-NEXT: st.w $a2, $a0, 0
-; LA32-NEXT: st.w $a7, $a0, 20
-; LA32-NEXT: st.w $t3, $a0, 4
-; LA32-NEXT: st.w $t8, $a0, 24
-; LA32-NEXT: st.w $fp, $a0, 8
-; LA32-NEXT: st.w $a3, $a0, 28
-; LA32-NEXT: st.w $a6, $a0, 12
-; LA32-NEXT: ld.w $s0, $sp, 8 # 4-byte Folded Reload
-; LA32-NEXT: ld.w $fp, $sp, 12 # 4-byte Folded Reload
-; LA32-NEXT: addi.w $sp, $sp, 16
-; LA32-NEXT: ret
-;
-; LA64-LABEL: vmulwev_q_du_d:
-; LA64: # %bb.0: # %entry
-; LA64-NEXT: xvld $xr0, $a1, 0
-; LA64-NEXT: xvld $xr1, $a2, 0
-; LA64-NEXT: xvpickve2gr.d $a1, $xr0, 2
-; LA64-NEXT: xvpickve2gr.d $a2, $xr0, 0
-; LA64-NEXT: xvpickve2gr.d $a3, $xr1, 0
-; LA64-NEXT: xvpickve2gr.d $a4, $xr1, 2
-; LA64-NEXT: srai.d $a5, $a4, 63
-; LA64-NEXT: srai.d $a6, $a3, 63
-; LA64-NEXT: mulh.du $a7, $a2, $a3
-; LA64-NEXT: mul.d $a6, $a2, $a6
-; LA64-NEXT: add.d $a6, $a7, $a6
-; LA64-NEXT: mulh.du $a7, $a1, $a4
-; LA64-NEXT: mul.d $a5, $a1, $a5
-; LA64-NEXT: add.d $a5, $a7, $a5
-; LA64-NEXT: mul.d $a2, $a2, $a3
-; LA64-NEXT: mul.d $a1, $a1, $a4
-; LA64-NEXT: st.d $a1, $a0, 16
-; LA64-NEXT: st.d $a2, $a0, 0
-; LA64-NEXT: st.d $a5, $a0, 24
-; LA64-NEXT: st.d $a6, $a0, 8
-; LA64-NEXT: ret
+; CHECK-LABEL: vmulwev_q_du_d:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xvld $xr0, $a1, 0
+; CHECK-NEXT: xvld $xr1, $a2, 0
+; CHECK-NEXT: xvmulwev.q.du.d $xr0, $xr0, $xr1
+; CHECK-NEXT: xvst $xr0, $a0, 0
+; CHECK-NEXT: ret
entry:
%va = load <4 x i64>, ptr %a
%vb = load <4 x i64>, ptr %b
@@ -963,117 +463,13 @@ entry:
}
define void @vmulwod_q_du_d(ptr %res, ptr %a, ptr %b) nounwind {
-; LA32-LABEL: vmulwod_q_du_d:
-; LA32: # %bb.0: # %entry
-; LA32-NEXT: addi.w $sp, $sp, -16
-; LA32-NEXT: st.w $fp, $sp, 12 # 4-byte Folded Spill
-; LA32-NEXT: st.w $s0, $sp, 8 # 4-byte Folded Spill
-; LA32-NEXT: xvld $xr0, $a1, 0
-; LA32-NEXT: xvpickve2gr.w $a3, $xr0, 7
-; LA32-NEXT: xvld $xr1, $a2, 0
-; LA32-NEXT: xvpickve2gr.w $a1, $xr0, 6
-; LA32-NEXT: xvpickve2gr.w $a6, $xr0, 3
-; LA32-NEXT: xvpickve2gr.w $a2, $xr0, 2
-; LA32-NEXT: xvpickve2gr.w $a4, $xr1, 6
-; LA32-NEXT: xvpickve2gr.w $a5, $xr1, 2
-; LA32-NEXT: xvpickve2gr.w $a7, $xr1, 3
-; LA32-NEXT: xvpickve2gr.w $t0, $xr1, 7
-; LA32-NEXT: srai.w $t1, $t0, 31
-; LA32-NEXT: srai.w $t2, $a7, 31
-; LA32-NEXT: mulh.wu $t3, $a2, $a5
-; LA32-NEXT: mul.w $t4, $a6, $a5
-; LA32-NEXT: add.w $t3, $t4, $t3
-; LA32-NEXT: sltu $t4, $t3, $t4
-; LA32-NEXT: mulh.wu $t5, $a6, $a5
-; LA32-NEXT: add.w $t4, $t5, $t4
-; LA32-NEXT: mul.w $t5, $a2, $a7
-; LA32-NEXT: add.w $t3, $t5, $t3
-; LA32-NEXT: sltu $t5, $t3, $t5
-; LA32-NEXT: mulh.wu $t6, $a2, $a7
-; LA32-NEXT: add.w $t5, $t6, $t5
-; LA32-NEXT: add.w $t5, $t4, $t5
-; LA32-NEXT: mul.w $t6, $a6, $a7
-; LA32-NEXT: add.w $t7, $t6, $t5
-; LA32-NEXT: mul.w $t8, $t2, $a2
-; LA32-NEXT: add.w $fp, $t7, $t8
-; LA32-NEXT: sltu $s0, $fp, $t7
-; LA32-NEXT: sltu $t6, $t7, $t6
-; LA32-NEXT: sltu $t4, $t5, $t4
-; LA32-NEXT: mulh.wu $a7, $a6, $a7
-; LA32-NEXT: add.w $a7, $a7, $t4
-; LA32-NEXT: add.w $a7, $a7, $t6
-; LA32-NEXT: mul.w $a6, $t2, $a6
-; LA32-NEXT: mulh.wu $t2, $t2, $a2
-; LA32-NEXT: add.w $a6, $t2, $a6
-; LA32-NEXT: add.w $a6, $a6, $t8
-; LA32-NEXT: add.w $a6, $a7, $a6
-; LA32-NEXT: add.w $a6, $a6, $s0
-; LA32-NEXT: mulh.wu $a7, $a1, $a4
-; LA32-NEXT: mul.w $t2, $a3, $a4
-; LA32-NEXT: add.w $a7, $t2, $a7
-; LA32-NEXT: sltu $t2, $a7, $t2
-; LA32-NEXT: mulh.wu $t4, $a3, $a4
-; LA32-NEXT: add.w $t2, $t4, $t2
-; LA32-NEXT: mul.w $t4, $a1, $t0
-; LA32-NEXT: add.w $a7, $t4, $a7
-; LA32-NEXT: sltu $t4, $a7, $t4
-; LA32-NEXT: mulh.wu $t5, $a1, $t0
-; LA32-NEXT: add.w $t4, $t5, $t4
-; LA32-NEXT: add.w $t4, $t2, $t4
-; LA32-NEXT: mul.w $t5, $a3, $t0
-; LA32-NEXT: add.w $t6, $t5, $t4
-; LA32-NEXT: mul.w $t7, $t1, $a1
-; LA32-NEXT: add.w $t8, $t6, $t7
-; LA32-NEXT: sltu $s0, $t8, $t6
-; LA32-NEXT: sltu $t5, $t6, $t5
-; LA32-NEXT: sltu $t2, $t4, $t2
-; LA32-NEXT: mulh.wu $t0, $a3, $t0
-; LA32-NEXT: add.w $t0, $t0, $t2
-; LA32-NEXT: add.w $t0, $t0, $t5
-; LA32-NEXT: mul.w $a3, $t1, $a3
-; LA32-NEXT: mulh.wu $t1, $t1, $a1
-; LA32-NEXT: add.w $a3, $t1, $a3
-; LA32-NEXT: add.w $a3, $a3, $t7
-; LA32-NEXT: add.w $a3, $t0, $a3
-; LA32-NEXT: add.w $a3, $a3, $s0
-; LA32-NEXT: mul.w $a2, $a2, $a5
-; LA32-NEXT: mul.w $a1, $a1, $a4
-; LA32-NEXT: st.w $a1, $a0, 16
-; LA32-NEXT: st.w $a2, $a0, 0
-; LA32-NEXT: st.w $a7, $a0, 20
-; LA32-NEXT: st.w $t3, $a0, 4
-; LA32-NEXT: st.w $t8, $a0, 24
-; LA32-NEXT: st.w $fp, $a0, 8
-; LA32-NEXT: st.w $a3, $a0, 28
-; LA32-NEXT: st.w $a6, $a0, 12
-; LA32-NEXT: ld.w $s0, $sp, 8 # 4-byte Folded Reload
-; LA32-NEXT: ld.w $fp, $sp, 12 # 4-byte Folded Reload
-; LA32-NEXT: addi.w $sp, $sp, 16
-; LA32-NEXT: ret
-;
-; LA64-LABEL: vmulwod_q_du_d:
-; LA64: # %bb.0: # %entry
-; LA64-NEXT: xvld $xr0, $a1, 0
-; LA64-NEXT: xvld $xr1, $a2, 0
-; LA64-NEXT: xvpickve2gr.d $a1, $xr0, 3
-; LA64-NEXT: xvpickve2gr.d $a2, $xr0, 1
-; LA64-NEXT: xvpickve2gr.d $a3, $xr1, 1
-; LA64-NEXT: xvpickve2gr.d $a4, $xr1, 3
-; LA64-NEXT: srai.d $a5, $a4, 63
-; LA64-NEXT: srai.d $a6, $a3, 63
-; LA64-NEXT: mulh.du $a7, $a2, $a3
-; LA64-NEXT: mul.d $a6, $a2, $a6
-; LA64-NEXT: add.d $a6, $a7, $a6
-; LA64-NEXT: mulh.du $a7, $a1, $a4
-; LA64-NEXT: mul.d $a5, $a1, $a5
-; LA64-NEXT: add.d $a5, $a7, $a5
-; LA64-NEXT: mul.d $a2, $a2, $a3
-; LA64-NEXT: mul.d $a1, $a1, $a4
-; LA64-NEXT: st.d $a1, $a0, 16
-; LA64-NEXT: st.d $a2, $a0, 0
-; LA64-NEXT: st.d $a5, $a0, 24
-; LA64-NEXT: st.d $a6, $a0, 8
-; LA64-NEXT: ret
+; CHECK-LABEL: vmulwod_q_du_d:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xvld $xr0, $a1, 0
+; CHECK-NEXT: xvld $xr1, $a2, 0
+; CHECK-NEXT: xvmulwod.q.du.d $xr0, $xr0, $xr1
+; CHECK-NEXT: xvst $xr0, $a0, 0
+; CHECK-NEXT: ret
entry:
%va = load <4 x i64>, ptr %a
%vb = load <4 x i64>, ptr %b
@@ -1147,117 +543,13 @@ entry:
}
define void @vmulwev_q_du_d_1(ptr %res, ptr %a, ptr %b) nounwind {
-; LA32-LABEL: vmulwev_q_du_d_1:
-; LA32: # %bb.0: # %entry
-; LA32-NEXT: addi.w $sp, $sp, -16
-; LA32-NEXT: st.w $fp, $sp, 12 # 4-byte Folded Spill
-; LA32-NEXT: st.w $s0, $sp, 8 # 4-byte Folded Spill
-; LA32-NEXT: xvld $xr0, $a1, 0
-; LA32-NEXT: xvpickve2gr.w $a1, $xr0, 4
-; LA32-NEXT: xvld $xr1, $a2, 0
-; LA32-NEXT: xvpickve2gr.w $a2, $xr0, 0
-; LA32-NEXT: xvpickve2gr.w $a6, $xr0, 1
-; LA32-NEXT: xvpickve2gr.w $a7, $xr0, 5
-; LA32-NEXT: xvpickve2gr.w $a5, $xr1, 5
-; LA32-NEXT: xvpickve2gr.w $a3, $xr1, 4
-; LA32-NEXT: xvpickve2gr.w $t0, $xr1, 1
-; LA32-NEXT: xvpickve2gr.w $a4, $xr1, 0
-; LA32-NEXT: srai.w $t1, $a7, 31
-; LA32-NEXT: srai.w $t2, $a6, 31
-; LA32-NEXT: mulh.wu $t3, $a2, $a4
-; LA32-NEXT: mul.w $t4, $a6, $a4
-; LA32-NEXT: add.w $t3, $t4, $t3
-; LA32-NEXT: sltu $t4, $t3, $t4
-; LA32-NEXT: mulh.wu $t5, $a6, $a4
-; LA32-NEXT: add.w $t4, $t5, $t4
-; LA32-NEXT: mul.w $t5, $a2, $t0
-; LA32-NEXT: add.w $t3, $t5, $t3
-; LA32-NEXT: sltu $t5, $t3, $t5
-; LA32-NEXT: mulh.wu $t6, $a2, $t0
-; LA32-NEXT: add.w $t5, $t6, $t5
-; LA32-NEXT: add.w $t5, $t4, $t5
-; LA32-NEXT: mul.w $t6, $a6, $t0
-; LA32-NEXT: add.w $t7, $t6, $t5
-; LA32-NEXT: mul.w $t8, $a4, $t2
-; LA32-NEXT: add.w $fp, $t7, $t8
-; LA32-NEXT: sltu $s0, $fp, $t7
-; LA32-NEXT: sltu $t6, $t7, $t6
-; LA32-NEXT: sltu $t4, $t5, $t4
-; LA32-NEXT: mulh.wu $a6, $a6, $t0
-; LA32-NEXT: add.w $a6, $a6, $t4
-; LA32-NEXT: add.w $a6, $a6, $t6
-; LA32-NEXT: mulh.wu $t4, $a4, $t2
-; LA32-NEXT: add.w $t4, $t4, $t8
-; LA32-NEXT: mul.w $t0, $t0, $t2
-; LA32-NEXT: add.w $t0, $t4, $t0
-; LA32-NEXT: add.w $a6, $a6, $t0
-; LA32-NEXT: add.w $a6, $a6, $s0
-; LA32-NEXT: mulh.wu $t0, $a1, $a3
-; LA32-NEXT: mul.w $t2, $a7, $a3
-; LA32-NEXT: add.w $t0, $t2, $t0
-; LA32-NEXT: sltu $t2, $t0, $t2
-; LA32-NEXT: mulh.wu $t4, $a7, $a3
-; LA32-NEXT: add.w $t2, $t4, $t2
-; LA32-NEXT: mul.w $t4, $a1, $a5
-; LA32-NEXT: add.w $t0, $t4, $t0
-; LA32-NEXT: sltu $t4, $t0, $t4
-; LA32-NEXT: mulh.wu $t5, $a1, $a5
-; LA32-NEXT: add.w $t4, $t5, $t4
-; LA32-NEXT: add.w $t4, $t2, $t4
-; LA32-NEXT: mul.w $t5, $a7, $a5
-; LA32-NEXT: add.w $t6, $t5, $t4
-; LA32-NEXT: mul.w $t7, $a3, $t1
-; LA32-NEXT: add.w $t8, $t6, $t7
-; LA32-NEXT: sltu $s0, $t8, $t6
-; LA32-NEXT: sltu $t5, $t6, $t5
-; LA32-NEXT: sltu $t2, $t4, $t2
-; LA32-NEXT: mulh.wu $a7, $a7, $a5
-; LA32-NEXT: add.w $a7, $a7, $t2
-; LA32-NEXT: add.w $a7, $a7, $t5
-; LA32-NEXT: mulh.wu $t2, $a3, $t1
-; LA32-NEXT: add.w $t2, $t2, $t7
-; LA32-NEXT: mul.w $a5, $a5, $t1
-; LA32-NEXT: add.w $a5, $t2, $a5
-; LA32-NEXT: add.w $a5, $a7, $a5
-; LA32-NEXT: add.w $a5, $a5, $s0
-; LA32-NEXT: mul.w $a2, $a2, $a4
-; LA32-NEXT: mul.w $a1, $a1, $a3
-; LA32-NEXT: st.w $a1, $a0, 16
-; LA32-NEXT: st.w $a2, $a0, 0
-; LA32-NEXT: st.w $t0, $a0, 20
-; LA32-NEXT: st.w $t3, $a0, 4
-; LA32-NEXT: st.w $t8, $a0, 24
-; LA32-NEXT: st.w $fp, $a0, 8
-; LA32-NEXT: st.w $a5, $a0, 28
-; LA32-NEXT: st.w $a6, $a0, 12
-; LA32-NEXT: ld.w $s0, $sp, 8 # 4-byte Folded Reload
-; LA32-NEXT: ld.w $fp, $sp, 12 # 4-byte Folded Reload
-; LA32-NEXT: addi.w $sp, $sp, 16
-; LA32-NEXT: ret
-;
-; LA64-LABEL: vmulwev_q_du_d_1:
-; LA64: # %bb.0: # %entry
-; LA64-NEXT: xvld $xr0, $a1, 0
-; LA64-NEXT: xvld $xr1, $a2, 0
-; LA64-NEXT: xvpickve2gr.d $a1, $xr0, 0
-; LA64-NEXT: xvpickve2gr.d $a2, $xr0, 2
-; LA64-NEXT: xvpickve2gr.d $a3, $xr1, 2
-; LA64-NEXT: xvpickve2gr.d $a4, $xr1, 0
-; LA64-NEXT: srai.d $a5, $a2, 63
-; LA64-NEXT: srai.d $a6, $a1, 63
-; LA64-NEXT: mulh.du $a7, $a1, $a4
-; LA64-NEXT: mul.d $a6, $a6, $a4
-; LA64-NEXT: add.d $a6, $a7, $a6
-; LA64-NEXT: mulh.du $a7, $a2, $a3
-; LA64-NEXT: mul.d $a5, $a5, $a3
-; LA64-NEXT: add.d $a5, $a7, $a5
-; LA64-NEXT: mul.d $a1, $a1, $a4
-; LA64-NEXT: mul.d $a2, $a2, $a3
-; LA64-NEXT: st.d $a2, $a0, 16
-; LA64-NEXT: st.d $a1, $a0, 0
-; LA64-NEXT: st.d $a5, $a0, 24
-; LA64-NEXT: st.d $a6, $a0, 8
-; LA64-NEXT: ret
+; CHECK-LABEL: vmulwev_q_du_d_1:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xvld $xr0, $a1, 0
+; CHECK-NEXT: xvld $xr1, $a2, 0
+; CHECK-NEXT: xvmulwev.q.du.d $xr0, $xr1, $xr0
+; CHECK-NEXT: xvst $xr0, $a0, 0
+; CHECK-NEXT: ret
entry:
%va = load <4 x i64>, ptr %a
%vb = load <4 x i64>, ptr %b
@@ -1331,117 +623,13 @@ entry:
}
define void @vmulwod_q_du_d_1(ptr %res, ptr %a, ptr %b) nounwind {
-; LA32-LABEL: vmulwod_q_du_d_1:
-; LA32: # %bb.0: # %entry
-; LA32-NEXT: addi.w $sp, $sp, -16
-; LA32-NEXT: st.w $fp, $sp, 12 # 4-byte Folded Spill
-; LA32-NEXT: st.w $s0, $sp, 8 # 4-byte Folded Spill
-; LA32-NEXT: xvld $xr0, $a1, 0
-; LA32-NEXT: xvpickve2gr.w $a1, $xr0, 6
-; LA32-NEXT: xvld $xr1, $a2, 0
-; LA32-NEXT: xvpickve2gr.w $a2, $xr0, 2
-; LA32-NEXT: xvpickve2gr.w $a6, $xr0, 3
-; LA32-NEXT: xvpickve2gr.w $a7, $xr0, 7
-; LA32-NEXT: xvpickve2gr.w $a5, $xr1, 7
-; LA32-NEXT: xvpickve2gr.w $a3, $xr1, 6
-; LA32-NEXT: xvpickve2gr.w $t0, $xr1, 3
-; LA32-NEXT: xvpickve2gr.w $a4, $xr1, 2
-; LA32-NEXT: srai.w $t1, $a7, 31
-; LA32-NEXT: srai.w $t2, $a6, 31
-; LA32-NEXT: mulh.wu $t3, $a2, $a4
-; LA32-NEXT: mul.w $t4, $a6, $a4
-; LA32-NEXT: add.w $t3, $t4, $t3
-; LA32-NEXT: sltu $t4, $t3, $t4
-; LA32-NEXT: mulh.wu $t5, $a6, $a4
-; LA32-NEXT: add.w $t4, $t5, $t4
-; LA32-NEXT: mul.w $t5, $a2, $t0
-; LA32-NEXT: add.w $t3, $t5, $t3
-; LA32-NEXT: sltu $t5, $t3, $t5
-; LA32-NEXT: mulh.wu $t6, $a2, $t0
-; LA32-NEXT: add.w $t5, $t6, $t5
-; LA32-NEXT: add.w $t5, $t4, $t5
-; LA32-NEXT: mul.w $t6, $a6, $t0
-; LA32-NEXT: add.w $t7, $t6, $t5
-; LA32-NEXT: mul.w $t8, $a4, $t2
-; LA32-NEXT: add.w $fp, $t7, $t8
-; LA32-NEXT: sltu $s0, $fp, $t7
-; LA32-NEXT: sltu $t6, $t7, $t6
-; LA32-NEXT: sltu $t4, $t5, $t4
-; LA32-NEXT: mulh.wu $a6, $a6, $t0
-; LA32-NEXT: add.w $a6, $a6, $t4
-; LA32-NEXT: add.w $a6, $a6, $t6
-; LA32-NEXT: mulh.wu $t4, $a4, $t2
-; LA32-NEXT: add.w $t4, $t4, $t8
-; LA32-NEXT: mul.w $t0, $t0, $t2
-; LA32-NEXT: add.w $t0, $t4, $t0
-; LA32-NEXT: add.w $a6, $a6, $t0
-; LA32-NEXT: add.w $a6, $a6, $s0
-; LA32-NEXT: mulh.wu $t0, $a1, $a3
-; LA32-NEXT: mul.w $t2, $a7, $a3
-; LA32-NEXT: add.w $t0, $t2, $t0
-; LA32-NEXT: sltu $t2, $t0, $t2
-; LA32-NEXT: mulh.wu $t4, $a7, $a3
-; LA32-NEXT: add.w $t2, $t4, $t2
-; LA32-NEXT: mul.w $t4, $a1, $a5
-; LA32-NEXT: add.w $t0, $t4, $t0
-; LA32-NEXT: sltu $t4, $t0, $t4
-; LA32-NEXT: mulh.wu $t5, $a1, $a5
-; LA32-NEXT: add.w $t4, $t5, $t4
-; LA32-NEXT: add.w $t4, $t2, $t4
-; LA32-NEXT: mul.w $t5, $a7, $a5
-; LA32-NEXT: add.w $t6, $t5, $t4
-; LA32-NEXT: mul.w $t7, $a3, $t1
-; LA32-NEXT: add.w $t8, $t6, $t7
-; LA32-NEXT: sltu $s0, $t8, $t6
-; LA32-NEXT: sltu $t5, $t6, $t5
-; LA32-NEXT: sltu $t2, $t4, $t2
-; LA32-NEXT: mulh.wu $a7, $a7, $a5
-; LA32-NEXT: add.w $a7, $a7, $t2
-; LA32-NEXT: add.w $a7, $a7, $t5
-; LA32-NEXT: mulh.wu $t2, $a3, $t1
-; LA32-NEXT: add.w $t2, $t2, $t7
-; LA32-NEXT: mul.w $a5, $a5, $t1
-; LA32-NEXT: add.w $a5, $t2, $a5
-; LA32-NEXT: add.w $a5, $a7, $a5
-; LA32-NEXT: add.w $a5, $a5, $s0
-; LA32-NEXT: mul.w $a2, $a2, $a4
-; LA32-NEXT: mul.w $a1, $a1, $a3
-; LA32-NEXT: st.w $a1, $a0, 16
-; LA32-NEXT: st.w $a2, $a0, 0
-; LA32-NEXT: st.w $t0, $a0, 20
-; LA32-NEXT: st.w $t3, $a0, 4
-; LA32-NEXT: st.w $t8, $a0, 24
-; LA32-NEXT: st.w $fp, $a0, 8
-; LA32-NEXT: st.w $a5, $a0, 28
-; LA32-NEXT: st.w $a6, $a0, 12
-; LA32-NEXT: ld.w $s0, $sp, 8 # 4-byte Folded Reload
-; LA32-NEXT: ld.w $fp, $sp, 12 # 4-byte Folded Reload
-; LA32-NEXT: addi.w $sp, $sp, 16
-; LA32-NEXT: ret
-;
-; LA64-LABEL: vmulwod_q_du_d_1:
-; LA64: # %bb.0: # %entry
-; LA64-NEXT: xvld $xr0, $a1, 0
-; LA64-NEXT: xvld $xr1, $a2, 0
-; LA64-NEXT: xvpickve2gr.d $a1, $xr0, 1
-; LA64-NEXT: xvpickve2gr.d $a2, $xr0, 3
-; LA64-NEXT: xvpickve2gr.d $a3, $xr1, 3
-; LA64-NEXT: xvpickve2gr.d $a4, $xr1, 1
-; LA64-NEXT: srai.d $a5, $a2, 63
-; LA64-NEXT: srai.d $a6, $a1, 63
-; LA64-NEXT: mulh.du $a7, $a1, $a4
-; LA64-NEXT: mul.d $a6, $a6, $a4
-; LA64-NEXT: add.d $a6, $a7, $a6
-; LA64-NEXT: mulh.du $a7, $a2, $a3
-; LA64-NEXT: mul.d $a5, $a5, $a3
-; LA64-NEXT: add.d $a5, $a7, $a5
-; LA64-NEXT: mul.d $a1, $a1, $a4
-; LA64-NEXT: mul.d $a2, $a2, $a3
-; LA64-NEXT: st.d $a2, $a0, 16
-; LA64-NEXT: st.d $a1, $a0, 0
-; LA64-NEXT: st.d $a5, $a0, 24
-; LA64-NEXT: st.d $a6, $a0, 8
-; LA64-NEXT: ret
+; CHECK-LABEL: vmulwod_q_du_d_1:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xvld $xr0, $a1, 0
+; CHECK-NEXT: xvld $xr1, $a2, 0
+; CHECK-NEXT: xvmulwod.q.du.d $xr0, $xr1, $xr0
+; CHECK-NEXT: xvst $xr0, $a0, 0
+; CHECK-NEXT: ret
entry:
%va = load <4 x i64>, ptr %a
%vb = load <4 x i64>, ptr %b
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