[llvm-branch-commits] [MISched] Add loop-carried WAR renaming for aggressive breaking (PR #231791)

[Pengcheng Wang via llvm-branch-commits]

https://github.com/wangpc-pp created https://github.com/llvm/llvm-project/pull/231791

Teach AggressiveAntiDepBreaker to break single-block loop-carried
write-after-read hazards. It finds a physical register whose live range
crosses the loop backedge and rewrites it to an otherwise unused
register, then runs the renaming from ScheduleDAGMI::finishBlock when
the aggressive breaker is selected.

Cover the single-block GPR, FPR, and vector cases plus the conservative
bailouts (single def, live-in use, non-renamable operands, multi-block
loops, missing uses, tied uses, no free register, and bundles) with a
RISC-V test. The bailout cases share one CHECK prefix because the
ANTIDEP and NO-ANTIDEP runs match; only the renamed cases differ.

Assisted-by: TRAE CLI (GPT-5.6)