[llvm-branch-commits] [llvm] [AMDGPU][NFC] Pre-commit test for integer raw.ptr.buffer.load.format (PR #231299)

[Krzysztof Drewniak via llvm-branch-commits]

https://github.com/krzysz00 updated https://github.com/llvm/llvm-project/pull/231299

>From ed98ea0803a6cb11e8ef1a48dc8ab22d1e69e99c Mon Sep 17 00:00:00 2001
From: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: Fri, 9 Oct 2026 02:28:16 +0000
Subject: [PATCH 1/2] [AMDGPU][NFC] Pre-commit test for integer
 raw.ptr.buffer.load.format

llvm.amdgcn.raw.ptr.buffer.load.format is restricted to floats for
some reason, even though it doesn't need to be (per its non-`.ptr`
counterpart). Pre-commit tests for the integer form.

AI disclosure: Claude wrote these tests, I wrote the message, the big
comment is temporary.

Co-Authored-By: Claude Opus 5 (1M context) <noreply at anthropic.com>
---
 ...dgcn.raw.ptr.buffer.load.format.integer.ll | 26 +++++++++++++++++++
 1 file changed, 26 insertions(+)
 create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.format.integer.ll

diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.format.integer.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.format.integer.ll
new file mode 100644
index 0000000000000..56556377fa0eb
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.format.integer.ll
@@ -0,0 +1,26 @@
+; RUN: not llc -mtriple=amdgcn -mcpu=gfx900 -filetype=null %s 2>&1 | FileCheck %s
+; RUN: not llc -global-isel -mtriple=amdgcn -mcpu=gfx900 -filetype=null %s 2>&1 | FileCheck %s
+
+; Only the first offending declaration is reported, so do not pin the type.
+; CHECK: error: intrinsic return type (overload type 0) expected any fp or fp vector
+
+define amdgpu_ps <4 x float> @raw_ptr_buffer_load_format_v4i32(ptr addrspace(8) inreg %rsrc) {
+main_body:
+  %data = call <4 x i32> @llvm.amdgcn.raw.ptr.buffer.load.format.v4i32(ptr addrspace(8) %rsrc, i32 0, i32 0, i32 0)
+  %fdata = bitcast <4 x i32> %data to <4 x float>
+  ret <4 x float> %fdata
+}
+
+define amdgpu_ps <4 x float> @raw_ptr_buffer_load_format_ofs_v4i32(ptr addrspace(8) inreg %rsrc, i32 %voffset) {
+main_body:
+  %data = call <4 x i32> @llvm.amdgcn.raw.ptr.buffer.load.format.v4i32(ptr addrspace(8) %rsrc, i32 %voffset, i32 0, i32 0)
+  %fdata = bitcast <4 x i32> %data to <4 x float>
+  ret <4 x float> %fdata
+}
+
+define amdgpu_ps float @raw_ptr_buffer_load_format_i32(ptr addrspace(8) inreg %rsrc, i32 %voffset, i32 inreg %soffset) {
+main_body:
+  %data = call i32 @llvm.amdgcn.raw.ptr.buffer.load.format.i32(ptr addrspace(8) %rsrc, i32 %voffset, i32 %soffset, i32 0)
+  %fdata = bitcast i32 %data to float
+  ret float %fdata
+}

>From fa04e1d2db5611f1c79b9917414e86a48e2fcfa6 Mon Sep 17 00:00:00 2001
From: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: Mon, 12 Oct 2026 22:28:39 +0000
Subject: [PATCH 2/2] [AI fixup] Test nits

Address review nits from PR #231308 on the precommit test:
- Use `< %s` instead of passing the file as an argument.
- Spell the SDAG run line's `-global-isel=0` explicitly and pair it
  with `-global-isel=1` instead of bare `-global-isel`.
- Use the same `amdgpu9.00-amd-mesa3d` triple the follow-up commit
  uses, so the diff there is confined to the behavior change.

Co-Authored-By: Claude Opus 5 (1M context) <noreply at anthropic.com>
---
 .../AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.format.integer.ll  | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.format.integer.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.format.integer.ll
index 56556377fa0eb..9e925ded23409 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.format.integer.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.format.integer.ll
@@ -1,5 +1,5 @@
-; RUN: not llc -mtriple=amdgcn -mcpu=gfx900 -filetype=null %s 2>&1 | FileCheck %s
-; RUN: not llc -global-isel -mtriple=amdgcn -mcpu=gfx900 -filetype=null %s 2>&1 | FileCheck %s
+; RUN: not llc -global-isel=0 -mtriple=amdgpu9.00-amd-mesa3d -filetype=null < %s 2>&1 | FileCheck %s
+; RUN: not llc -global-isel=1 -mtriple=amdgpu9.00-amd-mesa3d -filetype=null < %s 2>&1 | FileCheck %s
 
 ; Only the first offending declaration is reported, so do not pin the type.
 ; CHECK: error: intrinsic return type (overload type 0) expected any fp or fp vector