[llvm-branch-commits] [llvm] users/krzysz00/v4i32 buffer deprecate format d16 (PR #231300)
Krzysztof Drewniak via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Mon Oct 12 14:47:48 PDT 2026
https://github.com/krzysz00 updated https://github.com/llvm/llvm-project/pull/231300
>From 117e05ccc99dd2c6f4d96a6d79a8c95796a77221 Mon Sep 17 00:00:00 2001
From: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: Fri, 9 Oct 2026 18:12:50 +0000
Subject: [PATCH] [AMDGPU][NFC] Add d16 integer coverage for
raw.ptr.buffer.load.format
raw.ptr.buffer.load.format didn't have test coverage for the d16
paths, while other related intrinsics (like the non-`.ptr` versions)
did. This commit fixes the issue.
AI disclosure: Claude wrote these tests
Co-Authored-By: Claude Opus 5 (1M context) <noreply at anthropic.com>
---
...dgcn.raw.ptr.buffer.load.format.integer.ll | 119 +++++++++++++++++-
1 file changed, 117 insertions(+), 2 deletions(-)
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.format.integer.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.format.integer.ll
index 81ac68064c8a9..4c6860966c0f7 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.format.integer.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.format.integer.ll
@@ -1,8 +1,16 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc -mtriple=amdgpu9.00-amd-mesa3d -o - %s | FileCheck -check-prefix=SDAG %s
-; RUN: llc -global-isel -mtriple=amdgpu9.00-amd-mesa3d -o - %s | FileCheck -check-prefix=GISEL %s
+; RUN: llc -mtriple=amdgpu8.02-amd-mesa3d -o - %s | FileCheck -check-prefixes=SDAG,GFX8-SDAG %s
+; RUN: llc -global-isel -mtriple=amdgpu8.02-amd-mesa3d -o - %s | FileCheck -check-prefixes=GISEL,GFX8-GISEL %s
+; RUN: llc -mtriple=amdgpu9.00-amd-mesa3d -o - %s | FileCheck -check-prefixes=SDAG,GFX9-SDAG %s
+; RUN: llc -global-isel -mtriple=amdgpu9.00-amd-mesa3d -o - %s | FileCheck -check-prefixes=GISEL,GFX9-GISEL %s
define amdgpu_ps <4 x float> @raw_ptr_buffer_load_format_v4i32(ptr addrspace(8) inreg %rsrc) {
+;
+;
+;
+;
+;
+;
; SDAG-LABEL: raw_ptr_buffer_load_format_v4i32:
; SDAG: ; %bb.0: ; %main_body
; SDAG-NEXT: s_mov_b32 s7, s5
@@ -37,6 +45,12 @@ main_body:
}
define amdgpu_ps <4 x float> @raw_ptr_buffer_load_format_ofs_v4i32(ptr addrspace(8) inreg %rsrc, i32 %voffset) {
+;
+;
+;
+;
+;
+;
; SDAG-LABEL: raw_ptr_buffer_load_format_ofs_v4i32:
; SDAG: ; %bb.0: ; %main_body
; SDAG-NEXT: s_mov_b32 s7, s5
@@ -63,6 +77,12 @@ main_body:
}
define amdgpu_ps float @raw_ptr_buffer_load_format_i32(ptr addrspace(8) inreg %rsrc, i32 %voffset, i32 inreg %soffset) {
+;
+;
+;
+;
+;
+;
; SDAG-LABEL: raw_ptr_buffer_load_format_i32:
; SDAG: ; %bb.0: ; %main_body
; SDAG-NEXT: s_mov_b32 s11, s5
@@ -87,3 +107,98 @@ main_body:
%fdata = bitcast i32 %data to float
ret float %fdata
}
+
+; d16: the format load returns packed i16 data. These became legal for the ptr
+; form at the same time as the other integer types.
+define amdgpu_ps half @raw_ptr_buffer_load_format_i16(ptr addrspace(8) inreg %rsrc, i32 %voffset) {
+;
+;
+;
+;
+;
+;
+; SDAG-LABEL: raw_ptr_buffer_load_format_i16:
+; SDAG: ; %bb.0: ; %main_body
+; SDAG-NEXT: s_mov_b32 s7, s5
+; SDAG-NEXT: s_mov_b32 s6, s4
+; SDAG-NEXT: s_mov_b32 s5, s3
+; SDAG-NEXT: s_mov_b32 s4, s2
+; SDAG-NEXT: buffer_load_format_d16_x v0, v0, s[4:7], 0 offen
+; SDAG-NEXT: s_waitcnt vmcnt(0)
+; SDAG-NEXT: ; return to shader part epilog
+;
+; GISEL-LABEL: raw_ptr_buffer_load_format_i16:
+; GISEL: ; %bb.0: ; %main_body
+; GISEL-NEXT: s_mov_b32 s0, s2
+; GISEL-NEXT: s_mov_b32 s1, s3
+; GISEL-NEXT: s_mov_b32 s2, s4
+; GISEL-NEXT: s_mov_b32 s3, s5
+; GISEL-NEXT: buffer_load_format_d16_x v0, v0, s[0:3], 0 offen
+; GISEL-NEXT: s_waitcnt vmcnt(0)
+; GISEL-NEXT: ; return to shader part epilog
+main_body:
+ %data = call i16 @llvm.amdgcn.raw.ptr.buffer.load.format.i16(ptr addrspace(8) %rsrc, i32 %voffset, i32 0, i32 0)
+ %hdata = bitcast i16 %data to half
+ ret half %hdata
+}
+
+define amdgpu_ps <4 x half> @raw_ptr_buffer_load_format_v4i16(ptr addrspace(8) inreg %rsrc, i32 %voffset) {
+;
+;
+;
+;
+;
+;
+; GFX8-SDAG-LABEL: raw_ptr_buffer_load_format_v4i16:
+; GFX8-SDAG: ; %bb.0: ; %main_body
+; GFX8-SDAG-NEXT: s_mov_b32 s7, s5
+; GFX8-SDAG-NEXT: s_mov_b32 s6, s4
+; GFX8-SDAG-NEXT: s_mov_b32 s5, s3
+; GFX8-SDAG-NEXT: s_mov_b32 s4, s2
+; GFX8-SDAG-NEXT: buffer_load_format_d16_xyzw v[0:3], v0, s[4:7], 0 offen
+; GFX8-SDAG-NEXT: s_mov_b32 s0, 0x1000504
+; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0)
+; GFX8-SDAG-NEXT: v_perm_b32 v0, v0, v1, s0
+; GFX8-SDAG-NEXT: v_perm_b32 v1, v2, v3, s0
+; GFX8-SDAG-NEXT: ; return to shader part epilog
+;
+; GFX8-GISEL-LABEL: raw_ptr_buffer_load_format_v4i16:
+; GFX8-GISEL: ; %bb.0: ; %main_body
+; GFX8-GISEL-NEXT: s_mov_b32 s0, s2
+; GFX8-GISEL-NEXT: s_mov_b32 s1, s3
+; GFX8-GISEL-NEXT: s_mov_b32 s2, s4
+; GFX8-GISEL-NEXT: s_mov_b32 s3, s5
+; GFX8-GISEL-NEXT: buffer_load_format_d16_xyzw v[0:3], v0, s[0:3], 0 offen
+; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX8-GISEL-NEXT: v_and_b32_e32 v1, 0xffff, v1
+; GFX8-GISEL-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX8-GISEL-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX8-GISEL-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX8-GISEL-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX8-GISEL-NEXT: v_or_b32_sdwa v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
+; GFX8-GISEL-NEXT: ; return to shader part epilog
+;
+; GFX9-SDAG-LABEL: raw_ptr_buffer_load_format_v4i16:
+; GFX9-SDAG: ; %bb.0: ; %main_body
+; GFX9-SDAG-NEXT: s_mov_b32 s7, s5
+; GFX9-SDAG-NEXT: s_mov_b32 s6, s4
+; GFX9-SDAG-NEXT: s_mov_b32 s5, s3
+; GFX9-SDAG-NEXT: s_mov_b32 s4, s2
+; GFX9-SDAG-NEXT: buffer_load_format_d16_xyzw v[0:1], v0, s[4:7], 0 offen
+; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0)
+; GFX9-SDAG-NEXT: ; return to shader part epilog
+;
+; GFX9-GISEL-LABEL: raw_ptr_buffer_load_format_v4i16:
+; GFX9-GISEL: ; %bb.0: ; %main_body
+; GFX9-GISEL-NEXT: s_mov_b32 s0, s2
+; GFX9-GISEL-NEXT: s_mov_b32 s1, s3
+; GFX9-GISEL-NEXT: s_mov_b32 s2, s4
+; GFX9-GISEL-NEXT: s_mov_b32 s3, s5
+; GFX9-GISEL-NEXT: buffer_load_format_d16_xyzw v[0:1], v0, s[0:3], 0 offen
+; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0)
+; GFX9-GISEL-NEXT: ; return to shader part epilog
+main_body:
+ %data = call <4 x i16> @llvm.amdgcn.raw.ptr.buffer.load.format.v4i16(ptr addrspace(8) %rsrc, i32 %voffset, i32 0, i32 0)
+ %hdata = bitcast <4 x i16> %data to <4 x half>
+ ret <4 x half> %hdata
+}
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