[llvm-branch-commits] [llvm] bbbf266 - pre-commit test

[Tobias Hieta via llvm-branch-commits]

Author: Sander de Smalen
Date: 2026-10-12T16:55:15+02:00
New Revision: bbbf266c78bf1e1e498c1b1227fcc9848a643d58

URL: https://github.com/llvm/llvm-project/commit/bbbf266c78bf1e1e498c1b1227fcc9848a643d58
DIFF: https://github.com/llvm/llvm-project/commit/bbbf266c78bf1e1e498c1b1227fcc9848a643d58.diff

LOG: pre-commit test

Added: 
    llvm/test/Transforms/Inline/AArch64/sme-always-inline.ll

Modified: 
    

Removed: 
    


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diff  --git a/llvm/test/Transforms/Inline/AArch64/sme-always-inline.ll b/llvm/test/Transforms/Inline/AArch64/sme-always-inline.ll
new file mode 100644
index 0000000000000..0a5749a233813
--- /dev/null
+++ b/llvm/test/Transforms/Inline/AArch64/sme-always-inline.ll
@@ -0,0 +1,27 @@
+; REQUIRES: aarch64-registered-target
+; RUN: opt -passes=always-inline -S < %s | FileCheck %s
+
+target triple = "aarch64"
+
+define internal float @callee(float %v) #0 {
+; CHECK-LABEL: define internal float @callee(
+; CHECK-SAME: float [[V:%.*]]) #[[ATTR0:[0-9]+]] {
+; CHECK-NEXT:    [[RES:%.*]] = tail call float @llvm.sin.f32(float [[V]])
+; CHECK-NEXT:    ret float [[RES]]
+;
+  %res = tail call float @llvm.sin.f32(float %v)
+  ret float %res
+}
+
+define float @caller(float %v) #1 {
+; CHECK-LABEL: define float @caller(
+; CHECK-SAME: float [[V:%.*]]) #[[ATTR1:[0-9]+]] {
+; CHECK-NEXT:    [[RES:%.*]] = call float @callee(float [[V]])
+; CHECK-NEXT:    ret float [[RES]]
+;
+  %res = call float @callee(float %v)
+  ret float %res
+}
+
+attributes #0 = { "target-features"="+sme2" nounwind alwaysinline }
+attributes #1 = { "target-features"="+sme2" nounwind "aarch64_pstate_sm_enabled" }