[llvm-branch-commits] [llvm] [AMDGPU] Make amdgpu.noclobber respect acquire operations (PR #219991)

[Fabian Ritter via llvm-branch-commits]

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@@ -1290,9 +1284,9 @@ define amdgpu_kernel void @load_acquire_one_as_different(ptr addrspace(1) noalia
 define amdgpu_kernel void @fence_acquire_one_as_same(ptr addrspace(1) noalias %out, ptr addrspace(1) %p1, ptr addrspace(1) noalias %p1na) {
 ; CHECK-LABEL: define amdgpu_kernel void @fence_acquire_one_as_same(
 ; CHECK-SAME: ptr addrspace(1) noalias [[OUT:%.*]], ptr addrspace(1) [[P1:%.*]], ptr addrspace(1) noalias [[P1NA:%.*]]) {
-; CHECK-NEXT:    [[ACQ:%.*]] = load atomic i32, ptr addrspace(1) [[P1NA]] monotonic, align 4, !amdgpu.noclobber [[META0]]
+; CHECK-NEXT:    [[ACQ:%.*]] = load atomic i32, ptr addrspace(1) [[P1NA]] monotonic, align 4
 ; CHECK-NEXT:    fence syncscope("workgroup-one-as") acquire, !mmra [[META1:![0-9]+]]
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ritter-x2a wrote:

We have existing tests checking the code sequences generated for fences with one-as syncscope and `amdgpu-synchronize-as` MMRA, for example in [memory-legalizer-fence-mmra-local.ll](https://github.com/llvm/llvm-project/blob/452c9b5242948e337c750c59e8e23862b9cf0c6c/llvm/test/CodeGen/AMDGPU/memory-legalizer-fence-mmra-local.ll#L451).

Also, the [AMDGPUUsage](https://llvm.org/docs/AMDGPUUsage.html#memory-scopes) says the following:
>There is a one-as variant for each sync scope. If a release or acquire operation with a one-as sync scope participates in a synchronization, only the effects of memory operations in the address space of the one-as operation are synchronized. The address space of a fence instruction with one-as sync scope is specified via amdgpu-synchronize-as MMRAs (see [Fence and Address Spaces](https://llvm.org/docs/AMDGPUUsage.html#amdgpu-fence-as)).

(Disclaimer: I was the one to [add that paragraph there](https://github.com/llvm/llvm-project/pull/189016), so it's not a particularly strong argument, more of a note that we'd need to change that if it wasn't correct.)

https://github.com/llvm/llvm-project/pull/219991