[llvm-branch-commits] [llvm] [InstCombine] Fold fpto[su]i.sat of NaN guarded select (PR #230188)

[Harrison Hao via llvm-branch-commits]

harrisonGPU wrote:

I attached an AMD HIP sample that generates the IR pattern above:

```llvm
  %safe = select i1 %isnan, float 0.000000e+00, float %x
  %r = call i32 @llvm.fptosi.sat.i32.f32(float %safe)
```

You can reproduce it with the following command:

```bash
opt/rocm/core-10.0/llvm/bin/clang -x hip --offload-arch=gfx1201 --rocm-path=/opt/rocm/core-10.0 -O2 -fno-strict-float-cast-overflow --offload-device-only -S -emit-llvm sat.hip -o sat.opt.ll
```

My environment is Ubuntu 24.04 with a gfx1201 GPU.
[sat.zip](https://github.com/user-attachments/files/33278426/sat.zip)


https://github.com/llvm/llvm-project/pull/230188