[llvm-branch-commits] [llvm] [AMDGPU] Make amdgpu.noclobber respect acquire operations (PR #219991)

Krzysztof Drewniak via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Thu Oct 8 19:09:51 PDT 2026


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@@ -1290,9 +1284,9 @@ define amdgpu_kernel void @load_acquire_one_as_different(ptr addrspace(1) noalia
 define amdgpu_kernel void @fence_acquire_one_as_same(ptr addrspace(1) noalias %out, ptr addrspace(1) %p1, ptr addrspace(1) noalias %p1na) {
 ; CHECK-LABEL: define amdgpu_kernel void @fence_acquire_one_as_same(
 ; CHECK-SAME: ptr addrspace(1) noalias [[OUT:%.*]], ptr addrspace(1) [[P1:%.*]], ptr addrspace(1) noalias [[P1NA:%.*]]) {
-; CHECK-NEXT:    [[ACQ:%.*]] = load atomic i32, ptr addrspace(1) [[P1NA]] monotonic, align 4, !amdgpu.noclobber [[META0]]
+; CHECK-NEXT:    [[ACQ:%.*]] = load atomic i32, ptr addrspace(1) [[P1NA]] monotonic, align 4
 ; CHECK-NEXT:    fence syncscope("workgroup-one-as") acquire, !mmra [[META1:![0-9]+]]
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krzysz00 wrote:

Ok, so the barrier intrinsics (s.barrier.signal, s.barrier.wait, s.barrier) have no memory semantics - they're *just* control barriers

You get memory semantics by putting a release fence before the barrier and an acquire fence after the barrier

`__syncthreads` is implemented by doing this with no MMRAs on the fences

Adding MMRAs to the fences is how you get constructs that are important for performance in ML kernels such as the "LDS barrier" (as I tend to call it), which is also a thing in OpenCL

https://github.com/llvm/llvm-project/pull/219991


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