[llvm-branch-commits] [llvm] [NFC][AMDGPU] Create tables for async-related intrinsics (PR #225488)

[Sameer Sahasrabuddhe via llvm-branch-commits]

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@@ -2086,8 +2105,10 @@ class AMDGPURawBufferLoadLDS : Intrinsic <
    ImmArg<ArgIndex<6>>, IntrNoCallback, IntrNoFree], "", [SDNPMemOperand]>, AMDGPURsrcIntrinsic<0>;
 
 let TargetFeatures = "vmem-to-lds-load-insts" in {
-  def int_amdgcn_raw_buffer_load_lds : AMDGPURawBufferLoadLDS;
-  def int_amdgcn_raw_buffer_load_async_lds : AMDGPURawBufferLoadLDS;
+  def int_amdgcn_raw_buffer_load_lds : AMDGPURawBufferLoadLDS,
+        AMDGPULDSDMAIntrinsic;
+  def int_amdgcn_raw_buffer_load_async_lds : AMDGPURawBufferLoadLDS,
+        AMDGPUAsyncLDSDMAIntrinsic;
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ssahasra wrote:

My impression is that all buffer-to-LDS intrinsics are LDS DMA intrinsics. In that case, can we simply have the first class derive from the second class?

https://github.com/llvm/llvm-project/pull/225488