[llvm-branch-commits] [mlir] [mlir][LLVMIR] implement PromotableAliaserInterface (PR #199226)

Théo Degioanni via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Sun May 24 01:48:09 PDT 2026


================
@@ -1180,3 +1180,314 @@ llvm.func @dead_direct_use(%arg0 : i1) {
   }
   llvm.return
 }
+
+// -----
+
+// CHECK-LABEL: llvm.func @promote_load_through_bitcast
+// CHECK-SAME: (%[[ARG0:.*]]: i32) -> i32
+llvm.func @promote_load_through_bitcast(%arg0: i32) -> i32 {
+  %0 = llvm.mlir.constant(1 : i32) : i32
+  // CHECK-NOT: llvm.alloca
+  // CHECK-NOT: llvm.bitcast
+  %1 = llvm.alloca %0 x i32 : (i32) -> !llvm.ptr
+  %2 = llvm.bitcast %1 : !llvm.ptr to !llvm.ptr
+  llvm.store %arg0, %1 : i32, !llvm.ptr
+  %3 = llvm.load %2 : !llvm.ptr -> i32
+  // CHECK: llvm.return %[[ARG0]] : i32
+  llvm.return %3 : i32
+}
+
+// -----
+
+// CHECK-LABEL: llvm.func @promote_store_through_bitcast
+// CHECK-SAME: (%[[ARG0:.*]]: i32) -> i32
+llvm.func @promote_store_through_bitcast(%arg0: i32) -> i32 {
+  %0 = llvm.mlir.constant(1 : i32) : i32
+  // CHECK-NOT: llvm.alloca
+  // CHECK-NOT: llvm.bitcast
+  %1 = llvm.alloca %0 x i32 : (i32) -> !llvm.ptr
+  %2 = llvm.bitcast %1 : !llvm.ptr to !llvm.ptr
+  llvm.store %arg0, %2 : i32, !llvm.ptr
+  %3 = llvm.load %1 : !llvm.ptr -> i32
+  // CHECK: llvm.return %[[ARG0]] : i32
+  llvm.return %3 : i32
+}
+
+// -----
+
+// CHECK-LABEL: llvm.func @promote_store_and_load_through_bitcast
+// CHECK-SAME: (%[[ARG0:.*]]: i32) -> i32
+llvm.func @promote_store_and_load_through_bitcast(%arg0: i32) -> i32 {
+  %0 = llvm.mlir.constant(1 : i32) : i32
+  // CHECK-NOT: llvm.alloca
+  // CHECK-NOT: llvm.bitcast
+  %1 = llvm.alloca %0 x i32 : (i32) -> !llvm.ptr
+  %2 = llvm.bitcast %1 : !llvm.ptr to !llvm.ptr
+  llvm.store %arg0, %2 : i32, !llvm.ptr
+  %3 = llvm.load %2 : !llvm.ptr -> i32
+  // CHECK: llvm.return %[[ARG0]] : i32
+  llvm.return %3 : i32
+}
+
+// -----
+
+// CHECK-LABEL: llvm.func @promote_through_chained_bitcasts
+// CHECK-SAME: (%[[ARG0:.*]]: i32) -> i32
+llvm.func @promote_through_chained_bitcasts(%arg0: i32) -> i32 {
+  %0 = llvm.mlir.constant(1 : i32) : i32
+  // CHECK-NOT: llvm.alloca
+  // CHECK-NOT: llvm.bitcast
+  %1 = llvm.alloca %0 x i32 : (i32) -> !llvm.ptr
+  %2 = llvm.bitcast %1 : !llvm.ptr to !llvm.ptr
+  %3 = llvm.bitcast %2 : !llvm.ptr to !llvm.ptr
+  llvm.store %arg0, %3 : i32, !llvm.ptr
+  %4 = llvm.load %3 : !llvm.ptr -> i32
+  // CHECK: llvm.return %[[ARG0]] : i32
+  llvm.return %4 : i32
+}
+
+// -----
+
+// CHECK-LABEL: llvm.func amdgpu_kernelcc @promote_through_addrspacecast
+// CHECK-SAME: (%[[ARG0:.*]]: i32) -> i32
+llvm.func amdgpu_kernelcc @promote_through_addrspacecast(%arg0: i32) -> i32 {
+  %0 = llvm.mlir.constant(1 : i32) : i32
+  // CHECK-NOT: llvm.alloca
+  // CHECK-NOT: llvm.addrspacecast
+  %1 = llvm.alloca %0 x i32 : (i32) -> !llvm.ptr<5>
+  %2 = llvm.addrspacecast %1 : !llvm.ptr<5> to !llvm.ptr
+  llvm.store %arg0, %2 : i32, !llvm.ptr
+  %3 = llvm.load %2 : !llvm.ptr -> i32
+  // CHECK: llvm.return %[[ARG0]] : i32
+  llvm.return %3 : i32
+}
+
+// -----
+
+// CHECK-LABEL: llvm.func @promote_through_zero_gep
+// CHECK-SAME: (%[[ARG0:.*]]: i32) -> i32
+llvm.func @promote_through_zero_gep(%arg0: i32) -> i32 {
+  %0 = llvm.mlir.constant(1 : i32) : i32
+  // CHECK-NOT: llvm.alloca
+  // CHECK-NOT: llvm.getelementptr
+  %1 = llvm.alloca %0 x i32 : (i32) -> !llvm.ptr
+  %2 = llvm.getelementptr %1[0] : (!llvm.ptr) -> !llvm.ptr, i32
+  llvm.store %arg0, %2 : i32, !llvm.ptr
+  %3 = llvm.load %2 : !llvm.ptr -> i32
+  // CHECK: llvm.return %[[ARG0]] : i32
+  llvm.return %3 : i32
+}
+
+// -----
+
+// Non-zero GEPs are not aliases of the whole slot, so promotion must fail.
----------------
Moxinilian wrote:

Same opinion here.

https://github.com/llvm/llvm-project/pull/199226


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