[llvm-branch-commits] [llvm] [AMDGPU][True16] Legalize extloads into 16-bit registers (PR #198670)

[Joe Nash via llvm-branch-commits]

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@@ -29,12 +29,22 @@ define amdgpu_ps void @load_P0_B16_D16_Hi(<2 x i16> %vec, ptr addrspace(0) %ptra
 }
 
 define amdgpu_ps void @sextload_P0_i8_D16(<2 x i16> %vec, ptr addrspace(0) %ptra, ptr addrspace(0) %out) {
-; GFX12-LABEL: sextload_P0_i8_D16:
-; GFX12:       ; %bb.0:
-; GFX12-NEXT:    flat_load_d16_i8 v0, v[1:2]
-; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
-; GFX12-NEXT:    flat_store_b32 v[3:4], v0
-; GFX12-NEXT:    s_endpgm
+; GFX12-TRUE16-LABEL: sextload_P0_i8_D16:
+; GFX12-TRUE16:       ; %bb.0:
+; GFX12-TRUE16-NEXT:    flat_load_d16_i8 v1, v[1:2]
+; GFX12-TRUE16-NEXT:    s_wait_loadcnt_dscnt 0x0
+; GFX12-TRUE16-NEXT:    v_mov_b16_e32 v1.h, 0
+; GFX12-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)
+; GFX12-TRUE16-NEXT:    v_and_or_b32 v0, 0xffff0000, v0, v1
+; GFX12-TRUE16-NEXT:    flat_store_b32 v[3:4], v0
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Sisyph wrote:

Ok it is, nevermind. Please try to add the links to other commits in the stack though.

https://github.com/llvm/llvm-project/pull/198670