[llvm-branch-commits] [llvm] [2/3][AMDGPU] Physical register tracking in GCN trackers. (PR #184275)
Dhruva Chakrabarti via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Fri May 8 09:02:08 PDT 2026
================
@@ -320,12 +325,72 @@ class GCNRPTracker {
protected:
const LiveIntervals &LIS;
+
LiveRegSet VirtLiveRegs;
+
+ // Physical register liveness: Units provides O(1) unit-level alias checks,
+ // Regs tracks which register names contributed to pressure for cheap
+ // reconstruction. Both must be kept in sync.
+ struct PhysicalRegLiveness {
+ LiveRegUnits Units;
+ SmallDenseSet<MCRegister, 16> Regs;
+
+ void init(const TargetRegisterInfo &TRI) {
+ Units.init(TRI);
+ Regs.clear();
+ }
+ void clear() {
+ Units.clear();
+ Regs.clear();
+ }
+ const BitVector &getBitVector() const { return Units.getBitVector(); }
+
+ void add(Register Reg) {
----------------
dhruvachak wrote:
Fixed.
https://github.com/llvm/llvm-project/pull/184275
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