[llvm-branch-commits] [mlir] [MLIR][SPIRV] Enable strict property assembly format (PR #196282)
Mehdi Amini via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Thu May 7 05:00:21 PDT 2026
https://github.com/joker-eph updated https://github.com/llvm/llvm-project/pull/196282
>From 5d0a634e89856df49892cf235fe4c40d22f2331f Mon Sep 17 00:00:00 2001
From: Mehdi Amini <joker.eph at gmail.com>
Date: Wed, 6 May 2026 16:24:33 -0700
Subject: [PATCH 1/2] [MLIR][SPIRV] Enable strict property assembly format
Enable strict property assembly format mode for SPIR-V and add property
dictionaries to declarative formats that still carry inherent attributes outside
explicit operands or clauses.
Refresh ARM graph and TOSA tests so GraphConstant uses prop-dict spelling for
its inherent constant identifier.
Assisted-by: Codex
---
mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td | 1 +
.../mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td | 2 +-
mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGraphOps.td | 2 +-
mlir/test/Dialect/SPIRV/IR/graph-ops.mlir | 6 +++---
.../test/Dialect/SPIRV/IR/tosa-ops-verification.mlir | 12 ++++++------
mlir/test/Dialect/SPIRV/IR/tosa-ops.mlir | 2 +-
mlir/test/Target/SPIRV/graph-ops.mlir | 4 ++--
mlir/test/Target/SPIRV/tosa-ops.mlir | 2 +-
8 files changed, 16 insertions(+), 15 deletions(-)
diff --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
index b33a84d093fb9..7ba41873c36f9 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
@@ -52,6 +52,7 @@ def SPIRV_Dialect : Dialect {
let hasOperationAttrVerify = 1;
let hasRegionArgAttrVerify = 1;
let hasRegionResultAttrVerify = 1;
+ let useStrictPropertiesInAssemblyFormat = 1;
let extraClassDeclaration = [{
void registerAttributes();
diff --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td
index e7c314cb9acb9..d55fa93f4f4b0 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td
@@ -237,7 +237,7 @@ def SPIRV_FunctionCallOp : SPIRV_Op<"FunctionCall", [
let autogenSerialization = 0;
let assemblyFormat = [{
- $callee `(` $arguments `)` attr-dict `:`
+ $callee `(` $arguments `)` prop-dict attr-dict `:`
functional-type($arguments, results)
}];
}
diff --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGraphOps.td b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGraphOps.td
index d8012749131d6..b63a7813c44bb 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGraphOps.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGraphOps.td
@@ -151,7 +151,7 @@ def SPIRV_GraphConstantARMOp : SPIRV_GraphARMOp<"GraphConstant", [InGraphScope,
let autogenSerialization = 0;
let assemblyFormat = [{
- attr-dict `:` type($output)
+ prop-dict attr-dict `:` type($output)
}];
}
diff --git a/mlir/test/Dialect/SPIRV/IR/graph-ops.mlir b/mlir/test/Dialect/SPIRV/IR/graph-ops.mlir
index 798147df45a34..b8b2146a7e91f 100644
--- a/mlir/test/Dialect/SPIRV/IR/graph-ops.mlir
+++ b/mlir/test/Dialect/SPIRV/IR/graph-ops.mlir
@@ -18,8 +18,8 @@ spirv.ARM.Graph @graphAndOutputs(%arg0: !spirv.arm.tensor<14x19xi16>) -> !spirv.
// CHECK: spirv.ARM.Graph {{@.*}}() -> !spirv.arm.tensor<2x3xi16> {
spirv.ARM.Graph @graphConstant() -> !spirv.arm.tensor<2x3xi16> {
- // CHECK: [[CONST:%.*]] = spirv.ARM.GraphConstant {graph_constant_id = 42 : i32} : !spirv.arm.tensor<2x3xi16>
- %0 = spirv.ARM.GraphConstant { graph_constant_id = 42 : i32 } : !spirv.arm.tensor<2x3xi16>
+ // CHECK: [[CONST:%.*]] = spirv.ARM.GraphConstant <{graph_constant_id = 42 : i32}> : !spirv.arm.tensor<2x3xi16>
+ %0 = spirv.ARM.GraphConstant <{graph_constant_id = 42 : i32}> : !spirv.arm.tensor<2x3xi16>
// CHECK: spirv.ARM.GraphOutputs [[CONST:%.*]] : !spirv.arm.tensor<2x3xi16>
spirv.ARM.GraphOutputs %0 : !spirv.arm.tensor<2x3xi16>
}
@@ -63,7 +63,7 @@ spirv.ARM.Graph @graphNoOutputs(%arg0: !spirv.arm.tensor<14x19xi16>) -> () {
//===----------------------------------------------------------------------===//
// expected-error @+1 {{'spirv.ARM.GraphConstant' op failed to verify that op must appear in a spirv.ARM.Graph op's block}}
-%0 = spirv.ARM.GraphConstant { graph_constant_id = 42 : i32 } : !spirv.arm.tensor<2x3xi16>
+%0 = spirv.ARM.GraphConstant <{graph_constant_id = 42 : i32}> : !spirv.arm.tensor<2x3xi16>
// -----
//===----------------------------------------------------------------------===//
diff --git a/mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir b/mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
index ca15b69303361..079829b376099 100644
--- a/mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
+++ b/mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
@@ -1604,42 +1604,42 @@ spirv.ARM.Graph @sub_output_shape_does_not_match_broadcast_shape(%arg0: !spirv.a
//===----------------------------------------------------------------------===//
spirv.ARM.Graph @table_input_and_table_must_have_same_element_type(%arg0: !spirv.arm.tensor<3x2x15x7xi8>) -> (!spirv.arm.tensor<3x2x15x7xi8>) {
- %0 = spirv.ARM.GraphConstant {graph_constant_id = 0 : i32} : !spirv.arm.tensor<256xi16>
+ %0 = spirv.ARM.GraphConstant <{graph_constant_id = 0 : i32}> : !spirv.arm.tensor<256xi16>
// expected-error @+1 {{op failed to verify that all of {input1, table} have same element type}}
%1 = spirv.Tosa.Table %arg0, %0 : !spirv.arm.tensor<3x2x15x7xi8>, !spirv.arm.tensor<256xi16> -> !spirv.arm.tensor<3x2x15x7xi8>
spirv.ARM.GraphOutputs %1 : !spirv.arm.tensor<3x2x15x7xi8>
}
spirv.ARM.Graph @table_input_output_shapes_must_match(%arg0: !spirv.arm.tensor<3x2x15x7xi8>) -> (!spirv.arm.tensor<3x2x15x6xi8>) {
- %0 = spirv.ARM.GraphConstant {graph_constant_id = 0 : i32} : !spirv.arm.tensor<256xi8>
+ %0 = spirv.ARM.GraphConstant <{graph_constant_id = 0 : i32}> : !spirv.arm.tensor<256xi8>
// expected-error @+1 {{op failed to verify that all of {input1, output} have same shape}}
%1 = spirv.Tosa.Table %arg0, %0 : !spirv.arm.tensor<3x2x15x7xi8>, !spirv.arm.tensor<256xi8> -> !spirv.arm.tensor<3x2x15x6xi8>
spirv.ARM.GraphOutputs %1 : !spirv.arm.tensor<3x2x15x6xi8>
}
spirv.ARM.Graph @table_input_with_element_type_i8_requires_a_table_of_size_256(%arg0: !spirv.arm.tensor<3x2x15x7xi8>) -> (!spirv.arm.tensor<3x2x15x7xi8>) {
- %0 = spirv.ARM.GraphConstant {graph_constant_id = 0 : i32} : !spirv.arm.tensor<513xi8>
+ %0 = spirv.ARM.GraphConstant <{graph_constant_id = 0 : i32}> : !spirv.arm.tensor<513xi8>
// expected-error @+1 {{op failed to verify that table must have size 256 if input1 has element type 8-bit signless integer}}
%1 = spirv.Tosa.Table %arg0, %0 : !spirv.arm.tensor<3x2x15x7xi8>, !spirv.arm.tensor<513xi8> -> !spirv.arm.tensor<3x2x15x7xi8>
spirv.ARM.GraphOutputs %1 : !spirv.arm.tensor<3x2x15x7xi8>
}
spirv.ARM.Graph @table_input_with_element_type_i16_requires_a_table_of_size_513(%arg0: !spirv.arm.tensor<3x2x15x7xi16>) -> (!spirv.arm.tensor<3x2x15x7xi32>) {
- %0 = spirv.ARM.GraphConstant {graph_constant_id = 0 : i32} : !spirv.arm.tensor<256xi16>
+ %0 = spirv.ARM.GraphConstant <{graph_constant_id = 0 : i32}> : !spirv.arm.tensor<256xi16>
// expected-error @+1 {{op failed to verify that table must have size 513 if input1 has element type 16-bit signless integer}}
%1 = spirv.Tosa.Table %arg0, %0 : !spirv.arm.tensor<3x2x15x7xi16>, !spirv.arm.tensor<256xi16> -> !spirv.arm.tensor<3x2x15x7xi32>
spirv.ARM.GraphOutputs %1 : !spirv.arm.tensor<3x2x15x7xi32>
}
spirv.ARM.Graph @table_input_with_element_type_i8_requires_an_output_with_element_type_i8(%arg0: !spirv.arm.tensor<3x2x15x7xi8>) -> (!spirv.arm.tensor<3x2x15x7xi32>) {
- %0 = spirv.ARM.GraphConstant {graph_constant_id = 0 : i32} : !spirv.arm.tensor<256xi8>
+ %0 = spirv.ARM.GraphConstant <{graph_constant_id = 0 : i32}> : !spirv.arm.tensor<256xi8>
// expected-error @+1 {{op failed to verify that if input1 has type 8-bit signless integer then output must have a type in [8-bit signless integer]}}
%1 = spirv.Tosa.Table %arg0, %0 : !spirv.arm.tensor<3x2x15x7xi8>, !spirv.arm.tensor<256xi8> -> !spirv.arm.tensor<3x2x15x7xi32>
spirv.ARM.GraphOutputs %1 : !spirv.arm.tensor<3x2x15x7xi32>
}
spirv.ARM.Graph @table_input_with_element_type_i16_requires_an_output_with_element_type_i32(%arg0: !spirv.arm.tensor<3x2x15x7xi16>) -> (!spirv.arm.tensor<3x2x15x7xi8>) {
- %0 = spirv.ARM.GraphConstant {graph_constant_id = 0 : i32} : !spirv.arm.tensor<513xi16>
+ %0 = spirv.ARM.GraphConstant <{graph_constant_id = 0 : i32}> : !spirv.arm.tensor<513xi16>
// expected-error @+1 {{op failed to verify that if input1 has type 16-bit signless integer then output must have a type in [32-bit signless integer]}}
%1 = spirv.Tosa.Table %arg0, %0 : !spirv.arm.tensor<3x2x15x7xi16>, !spirv.arm.tensor<513xi16> -> !spirv.arm.tensor<3x2x15x7xi8>
spirv.ARM.GraphOutputs %1 : !spirv.arm.tensor<3x2x15x7xi8>
diff --git a/mlir/test/Dialect/SPIRV/IR/tosa-ops.mlir b/mlir/test/Dialect/SPIRV/IR/tosa-ops.mlir
index e1fcf2e3ec051..e0ef6077e4f61 100644
--- a/mlir/test/Dialect/SPIRV/IR/tosa-ops.mlir
+++ b/mlir/test/Dialect/SPIRV/IR/tosa-ops.mlir
@@ -523,7 +523,7 @@ spirv.ARM.Graph @sub_fp(%arg0: !spirv.arm.tensor<1x10x13x12xf16>, %arg1: !spirv.
//===----------------------------------------------------------------------===//
spirv.ARM.Graph @table_int(%arg0: !spirv.arm.tensor<3x2x15x7xi8>) -> (!spirv.arm.tensor<3x2x15x7xi8>) {
- %0 = spirv.ARM.GraphConstant {graph_constant_id = 0 : i32} : !spirv.arm.tensor<256xi8>
+ %0 = spirv.ARM.GraphConstant <{graph_constant_id = 0 : i32}> : !spirv.arm.tensor<256xi8>
// CHECK: {{%.*}} = spirv.Tosa.Table %arg0, {{%.*}} : !spirv.arm.tensor<3x2x15x7xi8>, !spirv.arm.tensor<256xi8> -> !spirv.arm.tensor<3x2x15x7xi8>
%1 = spirv.Tosa.Table %arg0, %0 : !spirv.arm.tensor<3x2x15x7xi8>, !spirv.arm.tensor<256xi8> -> !spirv.arm.tensor<3x2x15x7xi8>
// CHECK: spirv.ARM.GraphOutputs {{%.*}} : !spirv.arm.tensor<3x2x15x7xi8>
diff --git a/mlir/test/Target/SPIRV/graph-ops.mlir b/mlir/test/Target/SPIRV/graph-ops.mlir
index c956157bfa6c1..1515051e69b67 100644
--- a/mlir/test/Target/SPIRV/graph-ops.mlir
+++ b/mlir/test/Target/SPIRV/graph-ops.mlir
@@ -11,8 +11,8 @@ spirv.module Logical Vulkan requires #spirv.vce<v1.3, [VulkanMemoryModel, Shader
spirv.ARM.GraphEntryPoint @main, @main_arg_0, @main_res_0
// CHECK: spirv.ARM.Graph [[GN]]({{%.*}}: !spirv.arm.tensor<14x19xi16>) -> !spirv.arm.tensor<2x3xi16> attributes {entry_point = true} {
spirv.ARM.Graph @main(%arg0 : !spirv.arm.tensor<14x19xi16>) -> !spirv.arm.tensor<2x3xi16> attributes {entry_point = true} {
- // CHECK: [[CONST2:%.*]] = spirv.ARM.GraphConstant {graph_constant_id = 42 : i32} : !spirv.arm.tensor<2x3xi16>
- %0 = spirv.ARM.GraphConstant { graph_constant_id = 42 : i32 } : !spirv.arm.tensor<2x3xi16>
+ // CHECK: [[CONST2:%.*]] = spirv.ARM.GraphConstant <{graph_constant_id = 42 : i32}> : !spirv.arm.tensor<2x3xi16>
+ %0 = spirv.ARM.GraphConstant <{graph_constant_id = 42 : i32}> : !spirv.arm.tensor<2x3xi16>
// CHECK: spirv.ARM.GraphOutputs [[OUT:%.*]] : !spirv.arm.tensor<2x3xi16>
spirv.ARM.GraphOutputs %0 : !spirv.arm.tensor<2x3xi16>
}
diff --git a/mlir/test/Target/SPIRV/tosa-ops.mlir b/mlir/test/Target/SPIRV/tosa-ops.mlir
index 47e819636e982..c6edc44fb1903 100644
--- a/mlir/test/Target/SPIRV/tosa-ops.mlir
+++ b/mlir/test/Target/SPIRV/tosa-ops.mlir
@@ -926,7 +926,7 @@ spirv.module Logical Vulkan requires #spirv.vce<v1.3, [VulkanMemoryModel, Shader
spirv.GlobalVariable @table_int_res_0 bind(1, 0) : !spirv.ptr<!spirv.arm.tensor<3x2x15x7xi8>, UniformConstant>
spirv.ARM.GraphEntryPoint @table_int, @table_int_arg_0, @table_int_res_0
spirv.ARM.Graph @table_int(%arg0: !spirv.arm.tensor<3x2x15x7xi8>) -> (!spirv.arm.tensor<3x2x15x7xi8>) {
- %0 = spirv.ARM.GraphConstant {graph_constant_id = 0 : i32} : !spirv.arm.tensor<256xi8>
+ %0 = spirv.ARM.GraphConstant <{graph_constant_id = 0 : i32}> : !spirv.arm.tensor<256xi8>
// CHECK: {{%.*}} = spirv.Tosa.Table %arg0, {{%.*}} : !spirv.arm.tensor<3x2x15x7xi8>, !spirv.arm.tensor<256xi8> -> !spirv.arm.tensor<3x2x15x7xi8>
%1 = spirv.Tosa.Table %arg0, %0 : !spirv.arm.tensor<3x2x15x7xi8>, !spirv.arm.tensor<256xi8> -> !spirv.arm.tensor<3x2x15x7xi8>
// CHECK: spirv.ARM.GraphOutputs {{%.*}} : !spirv.arm.tensor<3x2x15x7xi8>
>From c13c2c3f729946d8df05e1fc0cd63cebc6f8e43d Mon Sep 17 00:00:00 2001
From: Mehdi Amini <joker.eph at gmail.com>
Date: Thu, 7 May 2026 04:38:02 -0700
Subject: [PATCH 2/2] [MLIR][SPIRV] Spell strict assembly properties directly
SPIR-V strict property assembly currently uses prop-dict for FunctionCall and
GraphConstant. Both operations have small inherent attributes that can be
covered directly by the declarative assembly format.
Spell FunctionCall arg/result attributes and GraphConstant IDs in the format,
and update tests to use the direct syntax instead of a property dictionary.
Assisted-by: Codex
---
.../mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td | 5 ++++-
mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGraphOps.td | 4 ++--
mlir/test/Dialect/SPIRV/IR/control-flow-ops.mlir | 9 +++++++--
mlir/test/Dialect/SPIRV/IR/graph-ops.mlir | 6 +++---
.../test/Dialect/SPIRV/IR/tosa-ops-verification.mlir | 12 ++++++------
mlir/test/Dialect/SPIRV/IR/tosa-ops.mlir | 2 +-
mlir/test/Target/SPIRV/graph-ops.mlir | 4 ++--
mlir/test/Target/SPIRV/tosa-ops.mlir | 2 +-
8 files changed, 26 insertions(+), 18 deletions(-)
diff --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td
index d55fa93f4f4b0..bc2bad2d24dbb 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td
@@ -237,7 +237,10 @@ def SPIRV_FunctionCallOp : SPIRV_Op<"FunctionCall", [
let autogenSerialization = 0;
let assemblyFormat = [{
- $callee `(` $arguments `)` prop-dict attr-dict `:`
+ $callee `(` $arguments `)`
+ (`arg_attrs` `=` $arg_attrs^)?
+ (`res_attrs` `=` $res_attrs^)?
+ attr-dict `:`
functional-type($arguments, results)
}];
}
diff --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGraphOps.td b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGraphOps.td
index b63a7813c44bb..cd0cf9f6c6282 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGraphOps.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGraphOps.td
@@ -127,7 +127,7 @@ def SPIRV_GraphConstantARMOp : SPIRV_GraphARMOp<"GraphConstant", [InGraphScope,
#### Example:
```mlir
- %0 = spirv.ARM.GraphConstant { graph_constant_id = 42 : i32 } : !spirv.arm.tensor<2x3xi16>
+ %0 = spirv.ARM.GraphConstant graph_constant_id = 42 : !spirv.arm.tensor<2x3xi16>
```
GraphConstantID is a unique identifier which is use to map the contants
@@ -151,7 +151,7 @@ def SPIRV_GraphConstantARMOp : SPIRV_GraphARMOp<"GraphConstant", [InGraphScope,
let autogenSerialization = 0;
let assemblyFormat = [{
- prop-dict attr-dict `:` type($output)
+ `graph_constant_id` `=` $graph_constant_id attr-dict `:` type($output)
}];
}
diff --git a/mlir/test/Dialect/SPIRV/IR/control-flow-ops.mlir b/mlir/test/Dialect/SPIRV/IR/control-flow-ops.mlir
index 81dce9822db48..1459de0c2d51f 100644
--- a/mlir/test/Dialect/SPIRV/IR/control-flow-ops.mlir
+++ b/mlir/test/Dialect/SPIRV/IR/control-flow-ops.mlir
@@ -165,7 +165,12 @@ spirv.module Logical GLSL450 {
spirv.FunctionCall @f_2() : () -> ()
// CHECK: {{%.*}} = spirv.FunctionCall @f_3({{%.*}}) : (i32) -> i32
%1 = spirv.FunctionCall @f_3(%arg2) : (i32) -> i32
- spirv.ReturnValue %1 : i32
+ // CHECK: {{%.*}} = spirv.FunctionCall @f_3({{%.*}}) arg_attrs = [{{.*}}] res_attrs = [{{.*}}] : (i32) -> i32
+ %2 = spirv.FunctionCall @f_3(%arg2)
+ arg_attrs = [{spirv.decoration = #spirv.decoration<RelaxedPrecision>}]
+ res_attrs = [{spirv.decoration = #spirv.decoration<RelaxedPrecision>}]
+ : (i32) -> i32
+ spirv.ReturnValue %2 : i32
}
spirv.func @f_0(%arg0 : vector<4xf32>, %arg1 : vector<4xf32>) -> (vector<4xf32>) "None" {
@@ -1107,6 +1112,7 @@ func.func @switch(%selector: i32) -> () {
spirv.Return
}
+
func.func @switch_only_default(%selector: i32) -> () {
// CHECK: spirv.Switch {{%.*}} : i32, [
// CHECK-NEXT: default: ^bb1
@@ -1239,4 +1245,3 @@ func.func @switch_missing_operand_type(%selector: i32) -> () {
^merge:
spirv.Return
}
-
diff --git a/mlir/test/Dialect/SPIRV/IR/graph-ops.mlir b/mlir/test/Dialect/SPIRV/IR/graph-ops.mlir
index b8b2146a7e91f..caaac0b5b9f16 100644
--- a/mlir/test/Dialect/SPIRV/IR/graph-ops.mlir
+++ b/mlir/test/Dialect/SPIRV/IR/graph-ops.mlir
@@ -18,8 +18,8 @@ spirv.ARM.Graph @graphAndOutputs(%arg0: !spirv.arm.tensor<14x19xi16>) -> !spirv.
// CHECK: spirv.ARM.Graph {{@.*}}() -> !spirv.arm.tensor<2x3xi16> {
spirv.ARM.Graph @graphConstant() -> !spirv.arm.tensor<2x3xi16> {
- // CHECK: [[CONST:%.*]] = spirv.ARM.GraphConstant <{graph_constant_id = 42 : i32}> : !spirv.arm.tensor<2x3xi16>
- %0 = spirv.ARM.GraphConstant <{graph_constant_id = 42 : i32}> : !spirv.arm.tensor<2x3xi16>
+ // CHECK: [[CONST:%.*]] = spirv.ARM.GraphConstant graph_constant_id = 42 : !spirv.arm.tensor<2x3xi16>
+ %0 = spirv.ARM.GraphConstant graph_constant_id = 42 : !spirv.arm.tensor<2x3xi16>
// CHECK: spirv.ARM.GraphOutputs [[CONST:%.*]] : !spirv.arm.tensor<2x3xi16>
spirv.ARM.GraphOutputs %0 : !spirv.arm.tensor<2x3xi16>
}
@@ -63,7 +63,7 @@ spirv.ARM.Graph @graphNoOutputs(%arg0: !spirv.arm.tensor<14x19xi16>) -> () {
//===----------------------------------------------------------------------===//
// expected-error @+1 {{'spirv.ARM.GraphConstant' op failed to verify that op must appear in a spirv.ARM.Graph op's block}}
-%0 = spirv.ARM.GraphConstant <{graph_constant_id = 42 : i32}> : !spirv.arm.tensor<2x3xi16>
+%0 = spirv.ARM.GraphConstant graph_constant_id = 42 : !spirv.arm.tensor<2x3xi16>
// -----
//===----------------------------------------------------------------------===//
diff --git a/mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir b/mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
index 079829b376099..697c4b433f8d1 100644
--- a/mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
+++ b/mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
@@ -1604,42 +1604,42 @@ spirv.ARM.Graph @sub_output_shape_does_not_match_broadcast_shape(%arg0: !spirv.a
//===----------------------------------------------------------------------===//
spirv.ARM.Graph @table_input_and_table_must_have_same_element_type(%arg0: !spirv.arm.tensor<3x2x15x7xi8>) -> (!spirv.arm.tensor<3x2x15x7xi8>) {
- %0 = spirv.ARM.GraphConstant <{graph_constant_id = 0 : i32}> : !spirv.arm.tensor<256xi16>
+ %0 = spirv.ARM.GraphConstant graph_constant_id = 0 : !spirv.arm.tensor<256xi16>
// expected-error @+1 {{op failed to verify that all of {input1, table} have same element type}}
%1 = spirv.Tosa.Table %arg0, %0 : !spirv.arm.tensor<3x2x15x7xi8>, !spirv.arm.tensor<256xi16> -> !spirv.arm.tensor<3x2x15x7xi8>
spirv.ARM.GraphOutputs %1 : !spirv.arm.tensor<3x2x15x7xi8>
}
spirv.ARM.Graph @table_input_output_shapes_must_match(%arg0: !spirv.arm.tensor<3x2x15x7xi8>) -> (!spirv.arm.tensor<3x2x15x6xi8>) {
- %0 = spirv.ARM.GraphConstant <{graph_constant_id = 0 : i32}> : !spirv.arm.tensor<256xi8>
+ %0 = spirv.ARM.GraphConstant graph_constant_id = 0 : !spirv.arm.tensor<256xi8>
// expected-error @+1 {{op failed to verify that all of {input1, output} have same shape}}
%1 = spirv.Tosa.Table %arg0, %0 : !spirv.arm.tensor<3x2x15x7xi8>, !spirv.arm.tensor<256xi8> -> !spirv.arm.tensor<3x2x15x6xi8>
spirv.ARM.GraphOutputs %1 : !spirv.arm.tensor<3x2x15x6xi8>
}
spirv.ARM.Graph @table_input_with_element_type_i8_requires_a_table_of_size_256(%arg0: !spirv.arm.tensor<3x2x15x7xi8>) -> (!spirv.arm.tensor<3x2x15x7xi8>) {
- %0 = spirv.ARM.GraphConstant <{graph_constant_id = 0 : i32}> : !spirv.arm.tensor<513xi8>
+ %0 = spirv.ARM.GraphConstant graph_constant_id = 0 : !spirv.arm.tensor<513xi8>
// expected-error @+1 {{op failed to verify that table must have size 256 if input1 has element type 8-bit signless integer}}
%1 = spirv.Tosa.Table %arg0, %0 : !spirv.arm.tensor<3x2x15x7xi8>, !spirv.arm.tensor<513xi8> -> !spirv.arm.tensor<3x2x15x7xi8>
spirv.ARM.GraphOutputs %1 : !spirv.arm.tensor<3x2x15x7xi8>
}
spirv.ARM.Graph @table_input_with_element_type_i16_requires_a_table_of_size_513(%arg0: !spirv.arm.tensor<3x2x15x7xi16>) -> (!spirv.arm.tensor<3x2x15x7xi32>) {
- %0 = spirv.ARM.GraphConstant <{graph_constant_id = 0 : i32}> : !spirv.arm.tensor<256xi16>
+ %0 = spirv.ARM.GraphConstant graph_constant_id = 0 : !spirv.arm.tensor<256xi16>
// expected-error @+1 {{op failed to verify that table must have size 513 if input1 has element type 16-bit signless integer}}
%1 = spirv.Tosa.Table %arg0, %0 : !spirv.arm.tensor<3x2x15x7xi16>, !spirv.arm.tensor<256xi16> -> !spirv.arm.tensor<3x2x15x7xi32>
spirv.ARM.GraphOutputs %1 : !spirv.arm.tensor<3x2x15x7xi32>
}
spirv.ARM.Graph @table_input_with_element_type_i8_requires_an_output_with_element_type_i8(%arg0: !spirv.arm.tensor<3x2x15x7xi8>) -> (!spirv.arm.tensor<3x2x15x7xi32>) {
- %0 = spirv.ARM.GraphConstant <{graph_constant_id = 0 : i32}> : !spirv.arm.tensor<256xi8>
+ %0 = spirv.ARM.GraphConstant graph_constant_id = 0 : !spirv.arm.tensor<256xi8>
// expected-error @+1 {{op failed to verify that if input1 has type 8-bit signless integer then output must have a type in [8-bit signless integer]}}
%1 = spirv.Tosa.Table %arg0, %0 : !spirv.arm.tensor<3x2x15x7xi8>, !spirv.arm.tensor<256xi8> -> !spirv.arm.tensor<3x2x15x7xi32>
spirv.ARM.GraphOutputs %1 : !spirv.arm.tensor<3x2x15x7xi32>
}
spirv.ARM.Graph @table_input_with_element_type_i16_requires_an_output_with_element_type_i32(%arg0: !spirv.arm.tensor<3x2x15x7xi16>) -> (!spirv.arm.tensor<3x2x15x7xi8>) {
- %0 = spirv.ARM.GraphConstant <{graph_constant_id = 0 : i32}> : !spirv.arm.tensor<513xi16>
+ %0 = spirv.ARM.GraphConstant graph_constant_id = 0 : !spirv.arm.tensor<513xi16>
// expected-error @+1 {{op failed to verify that if input1 has type 16-bit signless integer then output must have a type in [32-bit signless integer]}}
%1 = spirv.Tosa.Table %arg0, %0 : !spirv.arm.tensor<3x2x15x7xi16>, !spirv.arm.tensor<513xi16> -> !spirv.arm.tensor<3x2x15x7xi8>
spirv.ARM.GraphOutputs %1 : !spirv.arm.tensor<3x2x15x7xi8>
diff --git a/mlir/test/Dialect/SPIRV/IR/tosa-ops.mlir b/mlir/test/Dialect/SPIRV/IR/tosa-ops.mlir
index e0ef6077e4f61..fd0e86b8423b5 100644
--- a/mlir/test/Dialect/SPIRV/IR/tosa-ops.mlir
+++ b/mlir/test/Dialect/SPIRV/IR/tosa-ops.mlir
@@ -523,7 +523,7 @@ spirv.ARM.Graph @sub_fp(%arg0: !spirv.arm.tensor<1x10x13x12xf16>, %arg1: !spirv.
//===----------------------------------------------------------------------===//
spirv.ARM.Graph @table_int(%arg0: !spirv.arm.tensor<3x2x15x7xi8>) -> (!spirv.arm.tensor<3x2x15x7xi8>) {
- %0 = spirv.ARM.GraphConstant <{graph_constant_id = 0 : i32}> : !spirv.arm.tensor<256xi8>
+ %0 = spirv.ARM.GraphConstant graph_constant_id = 0 : !spirv.arm.tensor<256xi8>
// CHECK: {{%.*}} = spirv.Tosa.Table %arg0, {{%.*}} : !spirv.arm.tensor<3x2x15x7xi8>, !spirv.arm.tensor<256xi8> -> !spirv.arm.tensor<3x2x15x7xi8>
%1 = spirv.Tosa.Table %arg0, %0 : !spirv.arm.tensor<3x2x15x7xi8>, !spirv.arm.tensor<256xi8> -> !spirv.arm.tensor<3x2x15x7xi8>
// CHECK: spirv.ARM.GraphOutputs {{%.*}} : !spirv.arm.tensor<3x2x15x7xi8>
diff --git a/mlir/test/Target/SPIRV/graph-ops.mlir b/mlir/test/Target/SPIRV/graph-ops.mlir
index 1515051e69b67..999f9cfaf2e5e 100644
--- a/mlir/test/Target/SPIRV/graph-ops.mlir
+++ b/mlir/test/Target/SPIRV/graph-ops.mlir
@@ -11,8 +11,8 @@ spirv.module Logical Vulkan requires #spirv.vce<v1.3, [VulkanMemoryModel, Shader
spirv.ARM.GraphEntryPoint @main, @main_arg_0, @main_res_0
// CHECK: spirv.ARM.Graph [[GN]]({{%.*}}: !spirv.arm.tensor<14x19xi16>) -> !spirv.arm.tensor<2x3xi16> attributes {entry_point = true} {
spirv.ARM.Graph @main(%arg0 : !spirv.arm.tensor<14x19xi16>) -> !spirv.arm.tensor<2x3xi16> attributes {entry_point = true} {
- // CHECK: [[CONST2:%.*]] = spirv.ARM.GraphConstant <{graph_constant_id = 42 : i32}> : !spirv.arm.tensor<2x3xi16>
- %0 = spirv.ARM.GraphConstant <{graph_constant_id = 42 : i32}> : !spirv.arm.tensor<2x3xi16>
+ // CHECK: [[CONST2:%.*]] = spirv.ARM.GraphConstant graph_constant_id = 42 : !spirv.arm.tensor<2x3xi16>
+ %0 = spirv.ARM.GraphConstant graph_constant_id = 42 : !spirv.arm.tensor<2x3xi16>
// CHECK: spirv.ARM.GraphOutputs [[OUT:%.*]] : !spirv.arm.tensor<2x3xi16>
spirv.ARM.GraphOutputs %0 : !spirv.arm.tensor<2x3xi16>
}
diff --git a/mlir/test/Target/SPIRV/tosa-ops.mlir b/mlir/test/Target/SPIRV/tosa-ops.mlir
index c6edc44fb1903..d0bea7d41bad9 100644
--- a/mlir/test/Target/SPIRV/tosa-ops.mlir
+++ b/mlir/test/Target/SPIRV/tosa-ops.mlir
@@ -926,7 +926,7 @@ spirv.module Logical Vulkan requires #spirv.vce<v1.3, [VulkanMemoryModel, Shader
spirv.GlobalVariable @table_int_res_0 bind(1, 0) : !spirv.ptr<!spirv.arm.tensor<3x2x15x7xi8>, UniformConstant>
spirv.ARM.GraphEntryPoint @table_int, @table_int_arg_0, @table_int_res_0
spirv.ARM.Graph @table_int(%arg0: !spirv.arm.tensor<3x2x15x7xi8>) -> (!spirv.arm.tensor<3x2x15x7xi8>) {
- %0 = spirv.ARM.GraphConstant <{graph_constant_id = 0 : i32}> : !spirv.arm.tensor<256xi8>
+ %0 = spirv.ARM.GraphConstant graph_constant_id = 0 : !spirv.arm.tensor<256xi8>
// CHECK: {{%.*}} = spirv.Tosa.Table %arg0, {{%.*}} : !spirv.arm.tensor<3x2x15x7xi8>, !spirv.arm.tensor<256xi8> -> !spirv.arm.tensor<3x2x15x7xi8>
%1 = spirv.Tosa.Table %arg0, %0 : !spirv.arm.tensor<3x2x15x7xi8>, !spirv.arm.tensor<256xi8> -> !spirv.arm.tensor<3x2x15x7xi8>
// CHECK: spirv.ARM.GraphOutputs {{%.*}} : !spirv.arm.tensor<3x2x15x7xi8>
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