[llvm-branch-commits] [llvm] [MC] Move addEncodingComment() into new base class MCAsmBaseStreamer (PR #188585)
Kai Nacke via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Tue Mar 31 14:02:09 PDT 2026
https://github.com/redstar updated https://github.com/llvm/llvm-project/pull/188585
>From 3e56002c8e45176a5e2c54e18077e3e592909723 Mon Sep 17 00:00:00 2001
From: Kai Nacke <kai.peter.nacke at ibm.com>
Date: Wed, 25 Mar 2026 16:02:48 -0400
Subject: [PATCH 1/2] [MC] Move addEncodingComment() into new base class
MCAsmBaseStreamer
This is in preparation to use this functionality in the
SystemZHLASMAsmStreamer. No functional change.
---
llvm/include/llvm/MC/MCAsmStreamer.h | 33 ++++++-
llvm/lib/MC/CMakeLists.txt | 1 +
llvm/lib/MC/MCAsmBaseStreamer.cpp | 143 +++++++++++++++++++++++++++
llvm/lib/MC/MCAsmStreamer.cpp | 136 +------------------------
4 files changed, 180 insertions(+), 133 deletions(-)
create mode 100644 llvm/lib/MC/MCAsmBaseStreamer.cpp
diff --git a/llvm/include/llvm/MC/MCAsmStreamer.h b/llvm/include/llvm/MC/MCAsmStreamer.h
index 651a0dc75fce9..71e004ca92fd7 100644
--- a/llvm/include/llvm/MC/MCAsmStreamer.h
+++ b/llvm/include/llvm/MC/MCAsmStreamer.h
@@ -14,15 +14,46 @@
#ifndef LLVM_MC_MCASMSTREAMER_H
#define LLVM_MC_MCASMSTREAMER_H
+#include "llvm/MC/MCAsmBackend.h"
+#include "llvm/MC/MCAssembler.h"
+#include "llvm/MC/MCCodeEmitter.h"
#include "llvm/MC/MCStreamer.h"
+#include "llvm/Support/raw_ostream.h"
+#include <memory>
namespace llvm {
+class MCAsmInfo;
class MCContext;
+class MCInst;
+class MCSubtargetInfo;
class MCAsmBaseStreamer : public MCStreamer {
protected:
- MCAsmBaseStreamer(MCContext &Context) : MCStreamer(Context) {}
+ std::unique_ptr<MCAssembler> Assembler;
+ SmallString<128> CommentToEmit;
+ raw_svector_ostream CommentStream;
+ raw_null_ostream NullStream;
+
+ MCAsmBaseStreamer(MCContext &Context, std::unique_ptr<MCCodeEmitter> Emitter,
+ std::unique_ptr<MCAsmBackend> AsmBackend);
+
+public:
+ /// Return a raw_ostream that comments can be written to.
+ /// Unlike AddComment, you are required to terminate comments with \n if you
+ /// use this method.
+ raw_ostream &getCommentOS() override {
+ if (!isVerboseAsm())
+ return nulls(); // Discard comments unless in verbose asm mode.
+ return CommentStream;
+ }
+
+ /// Add a comment showing the encoding of an instruction.
+ /// \param Inst - The instruction to encode.
+ /// \param STI - Subtarget information.
+ void addEncodingComment(const MCInst &Inst, const MCSubtargetInfo &STI);
+
+ MCAssembler &getAssembler() { return *Assembler; }
};
} // end namespace llvm
diff --git a/llvm/lib/MC/CMakeLists.txt b/llvm/lib/MC/CMakeLists.txt
index 7a9e26af415c6..d42b735f1b130 100644
--- a/llvm/lib/MC/CMakeLists.txt
+++ b/llvm/lib/MC/CMakeLists.txt
@@ -5,6 +5,7 @@ add_llvm_component_library(LLVMMC
ELFObjectWriter.cpp
GOFFObjectWriter.cpp
MCAsmBackend.cpp
+ MCAsmBaseStreamer.cpp
MCAsmInfo.cpp
MCAsmInfoCOFF.cpp
MCAsmInfoDarwin.cpp
diff --git a/llvm/lib/MC/MCAsmBaseStreamer.cpp b/llvm/lib/MC/MCAsmBaseStreamer.cpp
new file mode 100644
index 0000000000000..c05b80e8f9d83
--- /dev/null
+++ b/llvm/lib/MC/MCAsmBaseStreamer.cpp
@@ -0,0 +1,143 @@
+//===- MCAsmBaseStreamer.cpp - Base Class for Asm Streamers -----*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#include "llvm/MC/MCAsmBaseStreamer.h"
+#include "llvm/ADT/SmallString.h"
+#include "llvm/ADT/SmallVector.h"
+#include "llvm/ADT/StringRef.h"
+#include "llvm/MC/MCAsmBackend.h"
+#include "llvm/MC/MCAsmInfo.h"
+#include "llvm/MC/MCAssembler.h"
+#include "llvm/MC/MCCodeEmitter.h"
+#include "llvm/MC/MCContext.h"
+#include "llvm/MC/MCFixup.h"
+#include "llvm/MC/MCInst.h"
+#include "llvm/MC/MCObjectWriter.h"
+#include "llvm/MC/MCSubtargetInfo.h"
+#include "llvm/Support/Format.h"
+#include "llvm/Support/raw_ostream.h"
+
+using namespace llvm;
+
+MCAsmBaseStreamer::MCAsmBaseStreamer(MCContext &Context,
+ std::unique_ptr<MCCodeEmitter> Emitter,
+ std::unique_ptr<MCAsmBackend> AsmBackend)
+ : MCStreamer(Context),
+ Assembler(std::make_unique<MCAssembler>(
+ Context, std::move(AsmBackend), std::move(Emitter),
+ (AsmBackend) ? AsmBackend->createObjectWriter(NullStream) : nullptr)),
+ CommentStream(CommentToEmit) {}
+
+void MCAsmBaseStreamer::addEncodingComment(const MCInst &Inst,
+ const MCSubtargetInfo &STI) {
+ raw_ostream &OS = getCommentOS();
+ SmallString<256> Code;
+ SmallVector<MCFixup, 4> Fixups;
+
+ // If we have no code emitter, don't emit code.
+ if (!getAssembler().getEmitterPtr())
+ return;
+
+ getAssembler().getEmitter().encodeInstruction(Inst, Code, Fixups, STI);
+
+ // RISC-V instructions are always little-endian, even on BE systems.
+ bool ForceLE = getContext().getTargetTriple().isRISCV();
+
+ const MCAsmInfo *MAI = getContext().getAsmInfo();
+
+ // If we are showing fixups, create symbolic markers in the encoded
+ // representation. We do this by making a per-bit map to the fixup item index,
+ // then trying to display it as nicely as possible.
+ SmallVector<uint8_t, 64> FixupMap;
+ FixupMap.resize(Code.size() * 8);
+ for (unsigned I = 0, E = Code.size() * 8; I != E; ++I)
+ FixupMap[I] = 0;
+
+ for (unsigned I = 0, E = Fixups.size(); I != E; ++I) {
+ MCFixup &F = Fixups[I];
+ MCFixupKindInfo Info =
+ getAssembler().getBackend().getFixupKindInfo(F.getKind());
+ for (unsigned J = 0; J != Info.TargetSize; ++J) {
+ unsigned Index = F.getOffset() * 8 + Info.TargetOffset + J;
+ assert(Index < Code.size() * 8 && "Invalid offset in fixup!");
+ FixupMap[Index] = 1 + I;
+ }
+ }
+
+ // FIXME: Note the fixup comments for Thumb2 are completely bogus since the
+ // high order halfword of a 32-bit Thumb2 instruction is emitted first.
+ OS << "encoding: [";
+ for (unsigned I = 0, E = Code.size(); I != E; ++I) {
+ if (I)
+ OS << ',';
+
+ // See if all bits are the same map entry.
+ uint8_t MapEntry = FixupMap[I * 8 + 0];
+ for (unsigned J = 1; J != 8; ++J) {
+ if (FixupMap[I * 8 + J] == MapEntry)
+ continue;
+
+ MapEntry = uint8_t(~0U);
+ break;
+ }
+
+ if (MapEntry != uint8_t(~0U)) {
+ if (MapEntry == 0) {
+ OS << format("0x%02x", uint8_t(Code[I]));
+ } else {
+ if (Code[I]) {
+ // FIXME: Some of the 8 bits require fix up.
+ OS << format("0x%02x", uint8_t(Code[I])) << '\''
+ << char('A' + MapEntry - 1) << '\'';
+ } else
+ OS << char('A' + MapEntry - 1);
+ }
+ } else {
+ // Otherwise, write out in binary.
+ OS << "0b";
+ for (unsigned J = 8; J--;) {
+ unsigned Bit = (Code[I] >> J) & 1;
+
+ unsigned FixupBit;
+ // RISC-V instructions are always little-endian.
+ // The FixupMap is indexed by actual bit positions in the LE
+ // instruction.
+ if (MAI->isLittleEndian() || ForceLE)
+ FixupBit = I * 8 + J;
+ else
+ FixupBit = I * 8 + (7 - J);
+
+ if (uint8_t MapEntry = FixupMap[FixupBit]) {
+ assert(Bit == 0 && "Encoder wrote into fixed up bit!");
+ OS << char('A' + MapEntry - 1);
+ } else
+ OS << Bit;
+ }
+ }
+ }
+ OS << "]\n";
+
+ for (unsigned I = 0, E = Fixups.size(); I != E; ++I) {
+ MCFixup &F = Fixups[I];
+ OS << " fixup " << char('A' + I) << " - "
+ << "offset: " << F.getOffset() << ", value: ";
+ MAI->printExpr(OS, *F.getValue());
+ auto Kind = F.getKind();
+ if (mc::isRelocation(Kind))
+ OS << ", relocation type: " << Kind;
+ else {
+ OS << ", kind: ";
+ auto Info = getAssembler().getBackend().getFixupKindInfo(Kind);
+ if (F.isPCRel() && StringRef(Info.Name).starts_with("FK_Data_"))
+ OS << "FK_PCRel_" << (Info.TargetSize / 8);
+ else
+ OS << Info.Name;
+ }
+ OS << '\n';
+ }
+}
diff --git a/llvm/lib/MC/MCAsmStreamer.cpp b/llvm/lib/MC/MCAsmStreamer.cpp
index 6b8caa046c7b9..5a8d23a923a6d 100644
--- a/llvm/lib/MC/MCAsmStreamer.cpp
+++ b/llvm/lib/MC/MCAsmStreamer.cpp
@@ -48,12 +48,8 @@ class MCAsmStreamer final : public MCAsmBaseStreamer {
formatted_raw_ostream &OS;
const MCAsmInfo *MAI;
std::unique_ptr<MCInstPrinter> InstPrinter;
- std::unique_ptr<MCAssembler> Assembler;
SmallString<128> ExplicitCommentToEmit;
- SmallString<128> CommentToEmit;
- raw_svector_ostream CommentStream;
- raw_null_ostream NullStream;
bool EmittedSectionDirective = false;
@@ -88,13 +84,9 @@ class MCAsmStreamer final : public MCAsmBaseStreamer {
std::unique_ptr<MCInstPrinter> printer,
std::unique_ptr<MCCodeEmitter> emitter,
std::unique_ptr<MCAsmBackend> asmbackend)
- : MCAsmBaseStreamer(Context), OSOwner(std::move(os)), OS(*OSOwner),
- MAI(Context.getAsmInfo()), InstPrinter(std::move(printer)),
- Assembler(std::make_unique<MCAssembler>(
- Context, std::move(asmbackend), std::move(emitter),
- (asmbackend) ? asmbackend->createObjectWriter(NullStream)
- : nullptr)),
- CommentStream(CommentToEmit) {
+ : MCAsmBaseStreamer(Context, std::move(emitter), std::move(asmbackend)),
+ OSOwner(std::move(os)), OS(*OSOwner), MAI(Context.getAsmInfo()),
+ InstPrinter(std::move(printer)) {
assert(InstPrinter);
if (Assembler->getBackendPtr())
setAllowAutoPadding(Assembler->getBackend().allowAutoPadding());
@@ -122,7 +114,6 @@ class MCAsmStreamer final : public MCAsmBaseStreamer {
}
}
- MCAssembler &getAssembler() { return *Assembler; }
MCAssembler *getAssemblerPtr() override { return nullptr; }
inline void EmitEOL() {
@@ -151,18 +142,6 @@ class MCAsmStreamer final : public MCAsmBaseStreamer {
/// and only when verbose assembly output is enabled.
void AddComment(const Twine &T, bool EOL = true) override;
- /// Add a comment showing the encoding of an instruction.
- void AddEncodingComment(const MCInst &Inst, const MCSubtargetInfo &);
-
- /// Return a raw_ostream that comments can be written to.
- /// Unlike AddComment, you are required to terminate comments with \n if you
- /// use this method.
- raw_ostream &getCommentOS() override {
- if (!IsVerboseAsm)
- return nulls(); // Discard comments unless in verbose asm mode.
- return CommentStream;
- }
-
void emitRawComment(const Twine &T, bool TabPrefix = true) override;
void addExplicitComment(const Twine &T) override;
@@ -2387,113 +2366,6 @@ void MCAsmStreamer::emitCGProfileEntry(const MCSymbolRefExpr *From,
EmitEOL();
}
-void MCAsmStreamer::AddEncodingComment(const MCInst &Inst,
- const MCSubtargetInfo &STI) {
- raw_ostream &OS = getCommentOS();
- SmallString<256> Code;
- SmallVector<MCFixup, 4> Fixups;
-
- // If we have no code emitter, don't emit code.
- if (!getAssembler().getEmitterPtr())
- return;
-
- getAssembler().getEmitter().encodeInstruction(Inst, Code, Fixups, STI);
-
- // RISC-V instructions are always little-endian, even on BE systems.
- bool ForceLE = getContext().getTargetTriple().isRISCV();
-
- // If we are showing fixups, create symbolic markers in the encoded
- // representation. We do this by making a per-bit map to the fixup item index,
- // then trying to display it as nicely as possible.
- SmallVector<uint8_t, 64> FixupMap;
- FixupMap.resize(Code.size() * 8);
- for (unsigned i = 0, e = Code.size() * 8; i != e; ++i)
- FixupMap[i] = 0;
-
- for (unsigned i = 0, e = Fixups.size(); i != e; ++i) {
- MCFixup &F = Fixups[i];
- MCFixupKindInfo Info =
- getAssembler().getBackend().getFixupKindInfo(F.getKind());
- for (unsigned j = 0; j != Info.TargetSize; ++j) {
- unsigned Index = F.getOffset() * 8 + Info.TargetOffset + j;
- assert(Index < Code.size() * 8 && "Invalid offset in fixup!");
- FixupMap[Index] = 1 + i;
- }
- }
-
- // FIXME: Note the fixup comments for Thumb2 are completely bogus since the
- // high order halfword of a 32-bit Thumb2 instruction is emitted first.
- OS << "encoding: [";
- for (unsigned i = 0, e = Code.size(); i != e; ++i) {
- if (i)
- OS << ',';
-
- // See if all bits are the same map entry.
- uint8_t MapEntry = FixupMap[i * 8 + 0];
- for (unsigned j = 1; j != 8; ++j) {
- if (FixupMap[i * 8 + j] == MapEntry)
- continue;
-
- MapEntry = uint8_t(~0U);
- break;
- }
-
- if (MapEntry != uint8_t(~0U)) {
- if (MapEntry == 0) {
- OS << format("0x%02x", uint8_t(Code[i]));
- } else {
- if (Code[i]) {
- // FIXME: Some of the 8 bits require fix up.
- OS << format("0x%02x", uint8_t(Code[i])) << '\''
- << char('A' + MapEntry - 1) << '\'';
- } else
- OS << char('A' + MapEntry - 1);
- }
- } else {
- // Otherwise, write out in binary.
- OS << "0b";
- for (unsigned j = 8; j--;) {
- unsigned Bit = (Code[i] >> j) & 1;
-
- unsigned FixupBit;
- // RISC-V instructions are always little-endian.
- // The FixupMap is indexed by actual bit positions in the LE
- // instruction.
- if (MAI->isLittleEndian() || ForceLE)
- FixupBit = i * 8 + j;
- else
- FixupBit = i * 8 + (7-j);
-
- if (uint8_t MapEntry = FixupMap[FixupBit]) {
- assert(Bit == 0 && "Encoder wrote into fixed up bit!");
- OS << char('A' + MapEntry - 1);
- } else
- OS << Bit;
- }
- }
- }
- OS << "]\n";
-
- for (unsigned i = 0, e = Fixups.size(); i != e; ++i) {
- MCFixup &F = Fixups[i];
- OS << " fixup " << char('A' + i) << " - "
- << "offset: " << F.getOffset() << ", value: ";
- MAI->printExpr(OS, *F.getValue());
- auto Kind = F.getKind();
- if (mc::isRelocation(Kind))
- OS << ", relocation type: " << Kind;
- else {
- OS << ", kind: ";
- auto Info = getAssembler().getBackend().getFixupKindInfo(Kind);
- if (F.isPCRel() && StringRef(Info.Name).starts_with("FK_Data_"))
- OS << "FK_PCRel_" << (Info.TargetSize / 8);
- else
- OS << Info.Name;
- }
- OS << '\n';
- }
-}
-
void MCAsmStreamer::emitInstruction(const MCInst &Inst,
const MCSubtargetInfo &STI) {
if (LFIRewriter && LFIRewriter->rewriteInst(Inst, *this, STI))
@@ -2510,7 +2382,7 @@ void MCAsmStreamer::emitInstruction(const MCInst &Inst,
MCDwarfLineEntry::make(this, getCurrentSectionOnly());
// Show the encoding in a comment if we have a code emitter.
- AddEncodingComment(Inst, STI);
+ addEncodingComment(Inst, STI);
// Show the MCInst if enabled.
if (ShowInst) {
>From d849742761dcb85c8a07de01a3491447cf2252e4 Mon Sep 17 00:00:00 2001
From: Kai Nacke <kai.peter.nacke at ibm.com>
Date: Tue, 31 Mar 2026 17:01:04 -0400
Subject: [PATCH 2/2] Move implementation of MCAsmBaseStreamer into
MCAsmStreamer.cpp
---
llvm/lib/MC/CMakeLists.txt | 1 -
llvm/lib/MC/MCAsmBaseStreamer.cpp | 143 ------------------------------
llvm/lib/MC/MCAsmStreamer.cpp | 118 ++++++++++++++++++++++++
3 files changed, 118 insertions(+), 144 deletions(-)
delete mode 100644 llvm/lib/MC/MCAsmBaseStreamer.cpp
diff --git a/llvm/lib/MC/CMakeLists.txt b/llvm/lib/MC/CMakeLists.txt
index d42b735f1b130..7a9e26af415c6 100644
--- a/llvm/lib/MC/CMakeLists.txt
+++ b/llvm/lib/MC/CMakeLists.txt
@@ -5,7 +5,6 @@ add_llvm_component_library(LLVMMC
ELFObjectWriter.cpp
GOFFObjectWriter.cpp
MCAsmBackend.cpp
- MCAsmBaseStreamer.cpp
MCAsmInfo.cpp
MCAsmInfoCOFF.cpp
MCAsmInfoDarwin.cpp
diff --git a/llvm/lib/MC/MCAsmBaseStreamer.cpp b/llvm/lib/MC/MCAsmBaseStreamer.cpp
deleted file mode 100644
index c05b80e8f9d83..0000000000000
--- a/llvm/lib/MC/MCAsmBaseStreamer.cpp
+++ /dev/null
@@ -1,143 +0,0 @@
-//===- MCAsmBaseStreamer.cpp - Base Class for Asm Streamers -----*- C++ -*-===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===----------------------------------------------------------------------===//
-
-#include "llvm/MC/MCAsmBaseStreamer.h"
-#include "llvm/ADT/SmallString.h"
-#include "llvm/ADT/SmallVector.h"
-#include "llvm/ADT/StringRef.h"
-#include "llvm/MC/MCAsmBackend.h"
-#include "llvm/MC/MCAsmInfo.h"
-#include "llvm/MC/MCAssembler.h"
-#include "llvm/MC/MCCodeEmitter.h"
-#include "llvm/MC/MCContext.h"
-#include "llvm/MC/MCFixup.h"
-#include "llvm/MC/MCInst.h"
-#include "llvm/MC/MCObjectWriter.h"
-#include "llvm/MC/MCSubtargetInfo.h"
-#include "llvm/Support/Format.h"
-#include "llvm/Support/raw_ostream.h"
-
-using namespace llvm;
-
-MCAsmBaseStreamer::MCAsmBaseStreamer(MCContext &Context,
- std::unique_ptr<MCCodeEmitter> Emitter,
- std::unique_ptr<MCAsmBackend> AsmBackend)
- : MCStreamer(Context),
- Assembler(std::make_unique<MCAssembler>(
- Context, std::move(AsmBackend), std::move(Emitter),
- (AsmBackend) ? AsmBackend->createObjectWriter(NullStream) : nullptr)),
- CommentStream(CommentToEmit) {}
-
-void MCAsmBaseStreamer::addEncodingComment(const MCInst &Inst,
- const MCSubtargetInfo &STI) {
- raw_ostream &OS = getCommentOS();
- SmallString<256> Code;
- SmallVector<MCFixup, 4> Fixups;
-
- // If we have no code emitter, don't emit code.
- if (!getAssembler().getEmitterPtr())
- return;
-
- getAssembler().getEmitter().encodeInstruction(Inst, Code, Fixups, STI);
-
- // RISC-V instructions are always little-endian, even on BE systems.
- bool ForceLE = getContext().getTargetTriple().isRISCV();
-
- const MCAsmInfo *MAI = getContext().getAsmInfo();
-
- // If we are showing fixups, create symbolic markers in the encoded
- // representation. We do this by making a per-bit map to the fixup item index,
- // then trying to display it as nicely as possible.
- SmallVector<uint8_t, 64> FixupMap;
- FixupMap.resize(Code.size() * 8);
- for (unsigned I = 0, E = Code.size() * 8; I != E; ++I)
- FixupMap[I] = 0;
-
- for (unsigned I = 0, E = Fixups.size(); I != E; ++I) {
- MCFixup &F = Fixups[I];
- MCFixupKindInfo Info =
- getAssembler().getBackend().getFixupKindInfo(F.getKind());
- for (unsigned J = 0; J != Info.TargetSize; ++J) {
- unsigned Index = F.getOffset() * 8 + Info.TargetOffset + J;
- assert(Index < Code.size() * 8 && "Invalid offset in fixup!");
- FixupMap[Index] = 1 + I;
- }
- }
-
- // FIXME: Note the fixup comments for Thumb2 are completely bogus since the
- // high order halfword of a 32-bit Thumb2 instruction is emitted first.
- OS << "encoding: [";
- for (unsigned I = 0, E = Code.size(); I != E; ++I) {
- if (I)
- OS << ',';
-
- // See if all bits are the same map entry.
- uint8_t MapEntry = FixupMap[I * 8 + 0];
- for (unsigned J = 1; J != 8; ++J) {
- if (FixupMap[I * 8 + J] == MapEntry)
- continue;
-
- MapEntry = uint8_t(~0U);
- break;
- }
-
- if (MapEntry != uint8_t(~0U)) {
- if (MapEntry == 0) {
- OS << format("0x%02x", uint8_t(Code[I]));
- } else {
- if (Code[I]) {
- // FIXME: Some of the 8 bits require fix up.
- OS << format("0x%02x", uint8_t(Code[I])) << '\''
- << char('A' + MapEntry - 1) << '\'';
- } else
- OS << char('A' + MapEntry - 1);
- }
- } else {
- // Otherwise, write out in binary.
- OS << "0b";
- for (unsigned J = 8; J--;) {
- unsigned Bit = (Code[I] >> J) & 1;
-
- unsigned FixupBit;
- // RISC-V instructions are always little-endian.
- // The FixupMap is indexed by actual bit positions in the LE
- // instruction.
- if (MAI->isLittleEndian() || ForceLE)
- FixupBit = I * 8 + J;
- else
- FixupBit = I * 8 + (7 - J);
-
- if (uint8_t MapEntry = FixupMap[FixupBit]) {
- assert(Bit == 0 && "Encoder wrote into fixed up bit!");
- OS << char('A' + MapEntry - 1);
- } else
- OS << Bit;
- }
- }
- }
- OS << "]\n";
-
- for (unsigned I = 0, E = Fixups.size(); I != E; ++I) {
- MCFixup &F = Fixups[I];
- OS << " fixup " << char('A' + I) << " - "
- << "offset: " << F.getOffset() << ", value: ";
- MAI->printExpr(OS, *F.getValue());
- auto Kind = F.getKind();
- if (mc::isRelocation(Kind))
- OS << ", relocation type: " << Kind;
- else {
- OS << ", kind: ";
- auto Info = getAssembler().getBackend().getFixupKindInfo(Kind);
- if (F.isPCRel() && StringRef(Info.Name).starts_with("FK_Data_"))
- OS << "FK_PCRel_" << (Info.TargetSize / 8);
- else
- OS << Info.Name;
- }
- OS << '\n';
- }
-}
diff --git a/llvm/lib/MC/MCAsmStreamer.cpp b/llvm/lib/MC/MCAsmStreamer.cpp
index 5a8d23a923a6d..78dee7deb03fa 100644
--- a/llvm/lib/MC/MCAsmStreamer.cpp
+++ b/llvm/lib/MC/MCAsmStreamer.cpp
@@ -41,6 +41,124 @@
using namespace llvm;
+MCAsmBaseStreamer::MCAsmBaseStreamer(MCContext &Context,
+ std::unique_ptr<MCCodeEmitter> Emitter,
+ std::unique_ptr<MCAsmBackend> AsmBackend)
+ : MCStreamer(Context),
+ Assembler(std::make_unique<MCAssembler>(
+ Context, std::move(AsmBackend), std::move(Emitter),
+ (AsmBackend) ? AsmBackend->createObjectWriter(NullStream) : nullptr)),
+ CommentStream(CommentToEmit) {}
+
+void MCAsmBaseStreamer::addEncodingComment(const MCInst &Inst,
+ const MCSubtargetInfo &STI) {
+ raw_ostream &OS = getCommentOS();
+ SmallString<256> Code;
+ SmallVector<MCFixup, 4> Fixups;
+
+ // If we have no code emitter, don't emit code.
+ if (!getAssembler().getEmitterPtr())
+ return;
+
+ getAssembler().getEmitter().encodeInstruction(Inst, Code, Fixups, STI);
+
+ // RISC-V instructions are always little-endian, even on BE systems.
+ bool ForceLE = getContext().getTargetTriple().isRISCV();
+
+ const MCAsmInfo *MAI = getContext().getAsmInfo();
+
+ // If we are showing fixups, create symbolic markers in the encoded
+ // representation. We do this by making a per-bit map to the fixup item index,
+ // then trying to display it as nicely as possible.
+ SmallVector<uint8_t, 64> FixupMap;
+ FixupMap.resize(Code.size() * 8);
+ for (unsigned I = 0, E = Code.size() * 8; I != E; ++I)
+ FixupMap[I] = 0;
+
+ for (unsigned I = 0, E = Fixups.size(); I != E; ++I) {
+ MCFixup &F = Fixups[I];
+ MCFixupKindInfo Info =
+ getAssembler().getBackend().getFixupKindInfo(F.getKind());
+ for (unsigned J = 0; J != Info.TargetSize; ++J) {
+ unsigned Index = F.getOffset() * 8 + Info.TargetOffset + J;
+ assert(Index < Code.size() * 8 && "Invalid offset in fixup!");
+ FixupMap[Index] = 1 + I;
+ }
+ }
+
+ // FIXME: Note the fixup comments for Thumb2 are completely bogus since the
+ // high order halfword of a 32-bit Thumb2 instruction is emitted first.
+ OS << "encoding: [";
+ for (unsigned I = 0, E = Code.size(); I != E; ++I) {
+ if (I)
+ OS << ',';
+
+ // See if all bits are the same map entry.
+ uint8_t MapEntry = FixupMap[I * 8 + 0];
+ for (unsigned J = 1; J != 8; ++J) {
+ if (FixupMap[I * 8 + J] == MapEntry)
+ continue;
+
+ MapEntry = uint8_t(~0U);
+ break;
+ }
+
+ if (MapEntry != uint8_t(~0U)) {
+ if (MapEntry == 0) {
+ OS << format("0x%02x", uint8_t(Code[I]));
+ } else {
+ if (Code[I]) {
+ // FIXME: Some of the 8 bits require fix up.
+ OS << format("0x%02x", uint8_t(Code[I])) << '\''
+ << char('A' + MapEntry - 1) << '\'';
+ } else
+ OS << char('A' + MapEntry - 1);
+ }
+ } else {
+ // Otherwise, write out in binary.
+ OS << "0b";
+ for (unsigned J = 8; J--;) {
+ unsigned Bit = (Code[I] >> J) & 1;
+
+ unsigned FixupBit;
+ // RISC-V instructions are always little-endian.
+ // The FixupMap is indexed by actual bit positions in the LE
+ // instruction.
+ if (MAI->isLittleEndian() || ForceLE)
+ FixupBit = I * 8 + J;
+ else
+ FixupBit = I * 8 + (7 - J);
+
+ if (uint8_t MapEntry = FixupMap[FixupBit]) {
+ assert(Bit == 0 && "Encoder wrote into fixed up bit!");
+ OS << char('A' + MapEntry - 1);
+ } else
+ OS << Bit;
+ }
+ }
+ }
+ OS << "]\n";
+
+ for (unsigned I = 0, E = Fixups.size(); I != E; ++I) {
+ MCFixup &F = Fixups[I];
+ OS << " fixup " << char('A' + I) << " - "
+ << "offset: " << F.getOffset() << ", value: ";
+ MAI->printExpr(OS, *F.getValue());
+ auto Kind = F.getKind();
+ if (mc::isRelocation(Kind))
+ OS << ", relocation type: " << Kind;
+ else {
+ OS << ", kind: ";
+ auto Info = getAssembler().getBackend().getFixupKindInfo(Kind);
+ if (F.isPCRel() && StringRef(Info.Name).starts_with("FK_Data_"))
+ OS << "FK_PCRel_" << (Info.TargetSize / 8);
+ else
+ OS << Info.Name;
+ }
+ OS << '\n';
+ }
+}
+
namespace {
class MCAsmStreamer final : public MCAsmBaseStreamer {
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