[llvm-branch-commits] [llvm] [AMDGPU][Scheduler] Prepare remat stage for rematerializer integration (NFC) (PR #189489)

[Matt Arsenault via llvm-branch-commits]

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@@ -424,6 +424,17 @@ bool GCNRPTarget::isSaveBeneficial(Register Reg) const {
   return (UnifiedRF && Excess.VGPR) || Excess.ArchVGPR;
 }
 
+bool GCNRPTarget::isSaveBeneficial(const GCNRegPressure &SaveRP) const {
+  RegExcess Excess(MF, RP, *this);
+  if (SaveRP.getSGPRNum() && Excess.SGPR)
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arsenm wrote:

```suggestion
  if (SaveRP.getSGPRNum() == 0 && Excess.SGPR)
```
Why is this 0?

https://github.com/llvm/llvm-project/pull/189489