[llvm-branch-commits] [llvm] [AArch64][llvm] Separate TLBI-only feature gating from TLBIP aliases (PR #187400)

[via llvm-branch-commits]

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@@ -866,11 +866,12 @@ class SysAliasRegUse<int reguse> {
 }
 
 class TLBICommon<string name, bits<3> op1, bits<4> crn, bits<4> crm,
-                 bits<3> op2, int reguse> : SysAliasRegUse<reguse> {
+                 bits<3> op2, bit nxs, int reguse> : SysAliasRegUse<reguse> {
   string Name = name;
   bits<14> Encoding;
   let Encoding{13-11} = op1;
   let Encoding{10-7} = crn;
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Lukacma wrote:

This is unnecessarily general encoding here. The only modifiable bit for crn is the last which is 0 for base and 1 for nxs from what I can see in spec.

https://github.com/llvm/llvm-project/pull/187400