[llvm-branch-commits] [llvm] [amdgpu-cfi: 7/9]: [AMDGPU] Implement CFI for CSR spills (PR #183150)
Matt Arsenault via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Fri Mar 20 15:50:16 PDT 2026
================
@@ -2242,12 +2242,59 @@ bool SIFrameLowering::spillCalleeSavedRegisters(
ArrayRef<CalleeSavedInfo> CSI, const TargetRegisterInfo *TRI) const {
MachineFunction *MF = MBB.getParent();
const GCNSubtarget &ST = MF->getSubtarget<GCNSubtarget>();
- if (!ST.useVGPRBlockOpsForCSR())
- return false;
+ const SIInstrInfo *TII = ST.getInstrInfo();
+ const MachineRegisterInfo &MRI = MF->getRegInfo();
+
+ if (!ST.useVGPRBlockOpsForCSR()) {
+ SparseBitVector<> LiveInRoots;
+ if (MRI.tracksLiveness()) {
+ for (const auto &LI : MBB.liveins()) {
+ for (MCRegUnitMaskIterator MI(LI.PhysReg, TRI); MI.isValid(); ++MI) {
+ auto [Unit, UnitLaneMask] = *MI;
+ if ((LI.LaneMask & UnitLaneMask).none())
+ continue;
+ for (MCRegUnitRootIterator RI(Unit, TRI); RI.isValid(); ++RI)
+ LiveInRoots.set(*RI);
+ }
+ }
+ }
+
+ auto UpdateLiveInCheckCanKill = [&](MCRegister Reg) {
----------------
arsenm wrote:
Make this not a lambda
https://github.com/llvm/llvm-project/pull/183150
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