[llvm-branch-commits] [clang] [CIR][NVPTX] NVPTX lowering info skeleton and target AS mapping (PR #186562)
David Rivera via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Fri Mar 13 22:44:13 PDT 2026
https://github.com/RiverDave created https://github.com/llvm/llvm-project/pull/186562
None
>From e6d5a498599514d447d51c3f8ae5e745710980b8 Mon Sep 17 00:00:00 2001
From: David Rivera <davidriverg at gmail.com>
Date: Sat, 14 Mar 2026 01:43:49 -0400
Subject: [PATCH] [CIR][NVPTX] NVPTX lowering info skeleton and target AS
mapping
---
.../Transforms/TargetLowering/CMakeLists.txt | 1 +
.../Transforms/TargetLowering/LowerModule.cpp | 3 ++
.../TargetLowering/TargetLoweringInfo.h | 2 +
.../TargetLowering/Targets/NVPTX.cpp | 39 +++++++++++++++++++
clang/test/CIR/CodeGenCUDA/address-spaces.cu | 12 +++++-
5 files changed, 55 insertions(+), 2 deletions(-)
create mode 100644 clang/lib/CIR/Dialect/Transforms/TargetLowering/Targets/NVPTX.cpp
diff --git a/clang/lib/CIR/Dialect/Transforms/TargetLowering/CMakeLists.txt b/clang/lib/CIR/Dialect/Transforms/TargetLowering/CMakeLists.txt
index 07e3a67f97859..86502b7f5dd4e 100644
--- a/clang/lib/CIR/Dialect/Transforms/TargetLowering/CMakeLists.txt
+++ b/clang/lib/CIR/Dialect/Transforms/TargetLowering/CMakeLists.txt
@@ -4,6 +4,7 @@ add_clang_library(MLIRCIRTargetLowering
LowerItaniumCXXABI.cpp
TargetLoweringInfo.cpp
Targets/AMDGPU.cpp
+ Targets/NVPTX.cpp
DEPENDS
clangBasic
diff --git a/clang/lib/CIR/Dialect/Transforms/TargetLowering/LowerModule.cpp b/clang/lib/CIR/Dialect/Transforms/TargetLowering/LowerModule.cpp
index 26e63b3b676ae..6b6eec473ec89 100644
--- a/clang/lib/CIR/Dialect/Transforms/TargetLowering/LowerModule.cpp
+++ b/clang/lib/CIR/Dialect/Transforms/TargetLowering/LowerModule.cpp
@@ -50,6 +50,9 @@ createTargetLoweringInfo(LowerModule &lm) {
switch (triple.getArch()) {
case llvm::Triple::amdgcn:
return createAMDGPUTargetLoweringInfo();
+ case llvm::Triple::nvptx:
+ case llvm::Triple::nvptx64:
+ return createNVPTXTargetLoweringInfo();
default:
assert(!cir::MissingFeatures::targetLoweringInfo());
return std::make_unique<TargetLoweringInfo>();
diff --git a/clang/lib/CIR/Dialect/Transforms/TargetLowering/TargetLoweringInfo.h b/clang/lib/CIR/Dialect/Transforms/TargetLowering/TargetLoweringInfo.h
index a307bcb373dec..2f778d8302f02 100644
--- a/clang/lib/CIR/Dialect/Transforms/TargetLowering/TargetLoweringInfo.h
+++ b/clang/lib/CIR/Dialect/Transforms/TargetLowering/TargetLoweringInfo.h
@@ -36,6 +36,8 @@ class TargetLoweringInfo {
// Target-specific factory functions.
std::unique_ptr<TargetLoweringInfo> createAMDGPUTargetLoweringInfo();
+std::unique_ptr<TargetLoweringInfo> createNVPTXTargetLoweringInfo();
+
} // namespace cir
#endif
diff --git a/clang/lib/CIR/Dialect/Transforms/TargetLowering/Targets/NVPTX.cpp b/clang/lib/CIR/Dialect/Transforms/TargetLowering/Targets/NVPTX.cpp
new file mode 100644
index 0000000000000..f38d2b8bfa32d
--- /dev/null
+++ b/clang/lib/CIR/Dialect/Transforms/TargetLowering/Targets/NVPTX.cpp
@@ -0,0 +1,39 @@
+//===- NVPTX.cpp ----------------------------------------------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+#include "../TargetLoweringInfo.h"
+#include "clang/CIR/Dialect/IR/CIROpsEnums.h"
+#include "llvm/Support/NVPTXAddrSpace.h"
+
+namespace cir {
+
+namespace {
+
+constexpr unsigned NVPTXAddrSpaceMap[] = {
+ llvm::NVPTXAS::ADDRESS_SPACE_GENERIC, llvm::NVPTXAS::ADDRESS_SPACE_GENERIC,
+ llvm::NVPTXAS::ADDRESS_SPACE_SHARED, llvm::NVPTXAS::ADDRESS_SPACE_GLOBAL,
+ llvm::NVPTXAS::ADDRESS_SPACE_CONST, llvm::NVPTXAS::ADDRESS_SPACE_GENERIC,
+};
+
+class NVPTXTargetLoweringInfo : public TargetLoweringInfo {
+public:
+ unsigned getTargetAddrSpaceFromCIRAddrSpace(
+ cir::LangAddressSpace addrSpace) const override {
+
+ auto idx = static_cast<unsigned>(addrSpace);
+ assert(idx < std::size(NVPTXAddrSpaceMap) &&
+ "Unknown CIR address space for NVPTX target");
+ return NVPTXAddrSpaceMap[idx];
+ }
+};
+
+} // namespace
+
+std::unique_ptr<TargetLoweringInfo> createNVPTXTargetLoweringInfo() {
+ return std::make_unique<NVPTXTargetLoweringInfo>();
+}
+} // namespace cir
diff --git a/clang/test/CIR/CodeGenCUDA/address-spaces.cu b/clang/test/CIR/CodeGenCUDA/address-spaces.cu
index 61db4a52b5905..54e85ab75bd76 100644
--- a/clang/test/CIR/CodeGenCUDA/address-spaces.cu
+++ b/clang/test/CIR/CodeGenCUDA/address-spaces.cu
@@ -3,8 +3,9 @@
// RUN: -mmlir -mlir-print-ir-before=cir-target-lowering %s -o %t.cir 2> %t-pre.cir
// RUN: FileCheck --check-prefix=CIR-PRE --input-file=%t-pre.cir %s
-// TODO: Add CIR (post target lowering) and LLVM checks once NVPTX TargetLoweringInfo
-// is implemented.
+// RUN: %clang_cc1 -triple nvptx64-nvidia-cuda -x cuda \
+// RUN: -fcuda-is-device -fclangir -emit-cir %s -o %t.cir
+// RUN: FileCheck --check-prefix=CIR-POST --input-file=%t.cir %s
// RUN: %clang_cc1 -triple nvptx64-nvidia-cuda -x cuda \
// RUN: -fcuda-is-device -emit-llvm %s -o %t.ll
@@ -15,28 +16,35 @@
#include "Inputs/cuda.h"
// CIR-PRE: cir.global external lang_address_space(offload_global) @i = #cir.int<0> : !s32i
+// CIR-POST: cir.global external target_address_space(1) @i = #cir.int<0> : !s32i
// OGCG-DAG: @i = addrspace(1) externally_initialized global i32 0, align 4
__device__ int i;
// CIR-PRE: cir.global constant external lang_address_space(offload_constant) @j = #cir.int<0> : !s32i
+// CIR-POST: cir.global constant external target_address_space(4) @j = #cir.int<0> : !s32i
// OGCG-DAG: @j = addrspace(4) externally_initialized constant i32 0, align 4
__constant__ int j;
// CIR-PRE: cir.global external lang_address_space(offload_local) @k = #cir.poison : !s32i
+// CIR-POST: cir.global external target_address_space(3) @k = #cir.poison : !s32i
// OGCG-DAG: @k = addrspace(3) global i32 undef, align 4
__shared__ int k;
// CIR-PRE: cir.global external lang_address_space(offload_local) @b = #cir.poison : !cir.float
+// CIR-POST: cir.global external target_address_space(3) @b = #cir.poison : !cir.float
// OGCG-DAG: @b = addrspace(3) global float undef, align 4
__shared__ float b;
__device__ void foo() {
// CIR-PRE: cir.get_global @i : !cir.ptr<!s32i, lang_address_space(offload_global)>
+ // CIR-POST: cir.get_global @i : !cir.ptr<!s32i, target_address_space(1)>
i++;
// CIR-PRE: cir.get_global @j : !cir.ptr<!s32i, lang_address_space(offload_constant)>
+ // CIR-POST: cir.get_global @j : !cir.ptr<!s32i, target_address_space(4)>
j++;
// CIR-PRE: cir.get_global @k : !cir.ptr<!s32i, lang_address_space(offload_local)>
+ // CIR-POST: cir.get_global @k : !cir.ptr<!s32i, target_address_space(3)>
k++;
}
More information about the llvm-branch-commits
mailing list