[llvm-branch-commits] [llvm] [AMDGPU] Add machine-level inliner pass (PR #169476)

[Matt Arsenault via llvm-branch-commits]

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+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1200 -amdgpu-enable-machine-level-inliner=0 < %s | FileCheck %s --check-prefixes=CHECK-ASM,NOINLINE-ASM
+; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1200 -amdgpu-enable-machine-level-inliner=1 < %s | FileCheck %s --check-prefixes=CHECK-ASM,INLINE-ASM
+; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1200 -amdgpu-enable-machine-level-inliner=0 -stop-after=amdgpu-machine-level-inliner < %s | FileCheck %s --check-prefixes=CHECK-MIR,NOINLINE-MIR
+; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1200 -amdgpu-enable-machine-level-inliner=1 -stop-after=amdgpu-machine-level-inliner < %s | FileCheck %s --check-prefixes=CHECK-MIR,INLINE-MIR
+
+define amdgpu_cs void @caller(i32 %input, ptr addrspace(1) %output) {
+  %result = call i32 (ptr, ...) @llvm.amdgcn.call.whole.wave(ptr @inlined_callee, i32 %input)
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arsenm wrote:

You can alternatively represent the WWM region after inlining, could have a WWM begin / end intrinsics with tokens 

https://github.com/llvm/llvm-project/pull/169476