[llvm-branch-commits] [llvm] [AMDGPU] Add machine-level inliner pass (PR #169476)

[Gang Chen via llvm-branch-commits]

cmc-rep wrote:

> > Because there are needs to do this after register allocation
> 
> I'm not sure I follow. If it's already inlined, there won't be a function call after RA, so the need wouldn't exist. Or are you suggesting a design where the callee cannot be inlined beforehand and we only want it to be inlined after RA? If that's the case, my humble opinion is that this design is not technically sound.

Diana and Sebastian have explained itin the conversation thread

https://github.com/llvm/llvm-project/pull/169476