[llvm-branch-commits] [llvm] [AMDGPU] Add machine-level inliner pass (PR #169476)

[Shilei Tian via llvm-branch-commits]

shiltian wrote:

I'm not sure this pass is a good idea because it would cause inconsistency between the IR level and the MIR level. For example, we can emit module level call graph information at the end of the IR pipeline and dump it into the final ELF. Today, this call graph stays the same through the backend pipeline, but with the pass proposed in this PR, that might no longer be the case. We could end up with stale call graph information.

Basically, with this PR, a lot of information from the IR level may no longer hold. If some MachineFunction passes rely on that information, it could become stale.

Also, the PR only handles inlining based on a special calling convention, which isn't really backend specific. Why can't this be done in the middle end with the regular inlining pass?

https://github.com/llvm/llvm-project/pull/169476