[llvm-branch-commits] [llvm] [AMDGPU] Physical register tracking in GCN trackers. (PR #184275)

[Matt Arsenault via llvm-branch-commits]

https://github.com/arsenm commented:

I really don't like how we're maintaining a parallel pressure tracking system. I also don't really understand how this is representing physical registers due to the lane masks 

https://github.com/llvm/llvm-project/pull/184275