[llvm-branch-commits] [llvm] release/23.x: [Mips] Fix Clang crashes when assembling MIPS div/rem with register-name symbol as divisor (#200354) (PR #212958)
Tobias Hieta via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Thu Jul 30 23:57:42 PDT 2026
https://github.com/tru updated https://github.com/llvm/llvm-project/pull/212958
>From 989e9efa0de6d887e85b76ff96a263a867c7ecb9 Mon Sep 17 00:00:00 2001
From: yingopq <115543042+yingopq at users.noreply.github.com>
Date: Thu, 30 Jul 2026 16:23:05 +0800
Subject: [PATCH] [Mips] Fix Clang crashes when assembling MIPS div/rem with
register-name symbol as divisor (#200354)
Add check before getimm().
Fix #185363.
(cherry picked from commit 2b45696fcafc0c92ea0ad73483b1e175c97c834a)
---
llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 2 ++
llvm/test/MC/Mips/macro-ddiv-bad.s | 11 +++++++----
llvm/test/MC/Mips/macro-ddivu-bad.s | 5 ++++-
llvm/test/MC/Mips/macro-div-bad.s | 7 +++++--
llvm/test/MC/Mips/macro-divu-bad.s | 7 +++++--
5 files changed, 23 insertions(+), 9 deletions(-)
diff --git a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
index 7587785052888..ebbab6b4828c4 100644
--- a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
+++ b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
@@ -2020,6 +2020,8 @@ bool MipsAsmParser::processInstruction(MCInst &Inst, SMLoc IDLoc,
case Mips::UDivIMacro:
case Mips::DSDivIMacro:
case Mips::DUDivIMacro:
+ if (!Inst.getOperand(2).isImm())
+ return Error(IDLoc, "expected immediate operand kind");
if (Inst.getOperand(2).getImm() == 0) {
if (Inst.getOperand(1).getReg() == Mips::ZERO ||
Inst.getOperand(1).getReg() == Mips::ZERO_64)
diff --git a/llvm/test/MC/Mips/macro-ddiv-bad.s b/llvm/test/MC/Mips/macro-ddiv-bad.s
index d8713d9948859..e59863c2c0828 100644
--- a/llvm/test/MC/Mips/macro-ddiv-bad.s
+++ b/llvm/test/MC/Mips/macro-ddiv-bad.s
@@ -4,15 +4,18 @@
# RUN: FileCheck %s --check-prefix=MIPS32-OR-R6
# RUN: not llvm-mc %s -triple=mips64 -mcpu=mips64r6 2>&1 | \
# RUN: FileCheck %s --check-prefix=MIPS32-OR-R6
-# RUN: llvm-mc %s -triple=mips64 -mcpu=mips64r2 2>&1 | \
+# RUN: not llvm-mc %s -triple=mips64 -mcpu=mips64r2 2>&1 | \
# RUN: FileCheck %s --check-prefix=MIPS64-NOT-R6
.text
- ddivu $25, $11
+ ddiv $25, $11
# MIPS32-OR-R6: :[[@LINE-1]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
- ddivu $25, $0
+ ddiv $25, $0
# MIPS64-NOT-R6: :[[@LINE-1]]:3: warning: division by zero
- ddivu $0,$0
+ ddiv $0,$0
# MIPS64-NOT-R6: :[[@LINE-1]]:3: warning: dividing zero by zero
+
+ ddiv $t0, $t1, f0
+ # MIPS64-NOT-R6: :[[@LINE-1]]:3: error: expected immediate operand kind
diff --git a/llvm/test/MC/Mips/macro-ddivu-bad.s b/llvm/test/MC/Mips/macro-ddivu-bad.s
index d8713d9948859..9150dc81c8daf 100644
--- a/llvm/test/MC/Mips/macro-ddivu-bad.s
+++ b/llvm/test/MC/Mips/macro-ddivu-bad.s
@@ -4,7 +4,7 @@
# RUN: FileCheck %s --check-prefix=MIPS32-OR-R6
# RUN: not llvm-mc %s -triple=mips64 -mcpu=mips64r6 2>&1 | \
# RUN: FileCheck %s --check-prefix=MIPS32-OR-R6
-# RUN: llvm-mc %s -triple=mips64 -mcpu=mips64r2 2>&1 | \
+# RUN: not llvm-mc %s -triple=mips64 -mcpu=mips64r2 2>&1 | \
# RUN: FileCheck %s --check-prefix=MIPS64-NOT-R6
.text
@@ -16,3 +16,6 @@
ddivu $0,$0
# MIPS64-NOT-R6: :[[@LINE-1]]:3: warning: dividing zero by zero
+
+ ddivu $t0, $t1, f0
+ # MIPS64-NOT-R6: :[[@LINE-1]]:3: error: expected immediate operand kind
diff --git a/llvm/test/MC/Mips/macro-div-bad.s b/llvm/test/MC/Mips/macro-div-bad.s
index 154316a4e9631..7bc8c1d031e55 100644
--- a/llvm/test/MC/Mips/macro-div-bad.s
+++ b/llvm/test/MC/Mips/macro-div-bad.s
@@ -2,9 +2,9 @@
# RUN: FileCheck %s --check-prefix=R6
# RUN: not llvm-mc %s -triple=mips64 -mcpu=mips64r6 2>&1 | \
# RUN: FileCheck %s --check-prefix=R6
-# RUN: llvm-mc %s -triple=mips -mcpu=mips32r2 2>&1 | \
+# RUN: not llvm-mc %s -triple=mips -mcpu=mips32r2 2>&1 | \
# RUN: FileCheck %s --check-prefix=NOT-R6
-# RUN: llvm-mc %s -triple=mips64 -mcpu=mips64r2 2>&1 | \
+# RUN: not llvm-mc %s -triple=mips64 -mcpu=mips64r2 2>&1 | \
# RUN: FileCheck %s --check-prefix=NOT-R6
.text
@@ -16,3 +16,6 @@
div $0,$0
# NOT-R6: :[[@LINE-1]]:3: warning: dividing zero by zero
+
+ div $t0, $t1, f0
+ # NOT-R6: :[[@LINE-1]]:3: error: expected immediate operand kind
diff --git a/llvm/test/MC/Mips/macro-divu-bad.s b/llvm/test/MC/Mips/macro-divu-bad.s
index 59289528d2527..87f8548b108c0 100644
--- a/llvm/test/MC/Mips/macro-divu-bad.s
+++ b/llvm/test/MC/Mips/macro-divu-bad.s
@@ -2,9 +2,9 @@
# RUN: FileCheck %s --check-prefix=R6
# RUN: not llvm-mc %s -triple=mips64 -mcpu=mips64r6 2>&1 | \
# RUN: FileCheck %s --check-prefix=R6
-# RUN: llvm-mc %s -triple=mips -mcpu=mips32r2 2>&1 | \
+# RUN: not llvm-mc %s -triple=mips -mcpu=mips32r2 2>&1 | \
# RUN: FileCheck %s --check-prefix=NOT-R6
-# RUN: llvm-mc %s -triple=mips64 -mcpu=mips64r2 2>&1 | \
+# RUN: not llvm-mc %s -triple=mips64 -mcpu=mips64r2 2>&1 | \
# RUN: FileCheck %s --check-prefix=NOT-R6
.text
@@ -16,3 +16,6 @@
divu $0,$0
# NOT-R6: :[[@LINE-1]]:3: warning: dividing zero by zero
+
+ divu $t0, $t1, f0
+ # NOT-R6: :[[@LINE-1]]:3: error: expected immediate operand kind
More information about the llvm-branch-commits
mailing list