[llvm-branch-commits] [llvm] [LV][REVEC][AArch64] Proof of concept for re-vectorisation (PR #208213)

[Gaëtan Bossu via llvm-branch-commits]

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+; RUN: opt -S -passes=loop-vectorize -mtriple=aarch64 -mattr=+sve \
+; RUN:     -scalable-vectorization=on -force-vector-interleave=1 \
+; RUN:     -vectorize-vector-loops < %s | FileCheck %s --check-prefix=IR
+; RUN: opt -disable-output -passes=loop-vectorize -mtriple=aarch64 -mattr=+sve \
+; RUN:     -scalable-vectorization=on -force-vector-interleave=1 \
+; RUN:     -vectorize-vector-loops -pass-remarks-analysis=loop-vectorize \
+; RUN:     < %s 2>&1 | FileCheck %s --check-prefix=REMARKS
+
+; IR-LABEL: @insertelement_cost(
+; IR-NOT: vector.body:
+; REMARKS: loop not vectorized: instruction return type cannot be vectorized
+define void @insertelement_cost(ptr noalias nocapture noundef writeonly %a, ptr nocapture noundef readonly %b) {
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gbossu wrote:

My point here is to test cases that are not yet supported for REVEC and ensure they are properly rejected. For that reason, I don't think it makes sense to check the IR.

Regarding other tests, they use auto-generated checks and filter out metadata. Do you have something else in mind? I'm not really aware of LV-specific conventions.

https://github.com/llvm/llvm-project/pull/208213