[llvm-branch-commits] [llvm] release/23.x: [RISCV] Don't move memory instructions across calls in isSafeToMove (#212236) (PR #212478)

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llvmorg-github-actions[bot] wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-risc-v

Author: llvmbot

<details>
<summary>Changes</summary>

Backport 840060f2f85c2d3f8ebe1c9304770d682e4141f6

Requested by: @<!-- -->wangpc-pp

---
Full diff: https://github.com/llvm/llvm-project/pull/212478.diff


2 Files Affected:

- (modified) llvm/lib/Target/RISCV/RISCVInstrInfo.cpp (+2-3) 
- (modified) llvm/test/CodeGen/RISCV/rvv/vmerge-peephole.mir (+24) 


``````````diff
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
index 6512dde8fde23..e36410fbcb593 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
@@ -5528,10 +5528,9 @@ bool RISCVInstrInfo::isSafeToMove(const MachineInstr &From,
       if (II->definesRegister(PhysReg, nullptr) ||
           II->readsRegister(PhysReg, nullptr))
         return false;
-    if (II->mayStore()) {
-      SawStore = true;
+    II->isSafeToMove(SawStore);
+    if (SawStore)
       break;
-    }
   }
   return From.isSafeToMove(SawStore);
 }
diff --git a/llvm/test/CodeGen/RISCV/rvv/vmerge-peephole.mir b/llvm/test/CodeGen/RISCV/rvv/vmerge-peephole.mir
index f7188c47f2a64..c06e0b5ee81be 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vmerge-peephole.mir
+++ b/llvm/test/CodeGen/RISCV/rvv/vmerge-peephole.mir
@@ -284,3 +284,27 @@ body: |
     %avl:gprnox0 = ADDI $noreg, 1
     %z:vrnov0 = PseudoVMERGE_VVM_M1 $noreg, %false:vrnov0, %x:vrnov0, %mask, %avl, 5
 ...
+---
+# Negative test: don't fold the load into the vmerge if that would sink the
+# load past a call, since the callee may clobber the loaded memory.
+name: vle32_cant_sink_past_call
+tracksRegLiveness: true
+body: |
+  bb.0:
+    liveins: $x8, $v0
+    ; CHECK-LABEL: name: vle32_cant_sink_past_call
+    ; CHECK: liveins: $x8, $v0
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: %avl:gprnox0 = COPY $x8
+    ; CHECK-NEXT: %mask:vmv0 = COPY $v0
+    ; CHECK-NEXT: %x:vrnov0 = PseudoVLE32_V_M1 $noreg, $noreg, %avl /* vl */, 5 /* e32 */, 2 /* tu, ma */ :: (load unknown-size, align 1)
+    ; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &foo, csr_ilp32d_lp64d, implicit-def dead $x1, implicit-def $x2
+    ; CHECK-NEXT: %false:vrnov0 = PseudoVMV_V_I_M1 $noreg, 0, %avl /* vl */, 5 /* e32 */, 0 /* tu, mu */
+    ; CHECK-NEXT: %y:vrnov0 = PseudoVMERGE_VVM_M1 $noreg, %false, %x, %mask, %avl /* vl */, 5 /* e32 */
+    %avl:gprnox0 = COPY $x8
+    %mask:vmv0 = COPY $v0
+    %x:vrnov0 = PseudoVLE32_V_M1 $noreg, $noreg, %avl, 5 /* e32 */, 2 /* tu, ma */ :: (load unknown-size)
+    PseudoCALL target-flags(riscv-call) &foo, csr_ilp32d_lp64d, implicit-def dead $x1, implicit-def $x2
+    %false:vrnov0 = PseudoVMV_V_I_M1 $noreg, 0, %avl, 5 /* e32 */, 0 /* tu, mu */
+    %y:vrnov0 = PseudoVMERGE_VVM_M1 $noreg, %false, %x, %mask, %avl, 5 /* e32 */
+...

``````````

</details>


https://github.com/llvm/llvm-project/pull/212478