[llvm-branch-commits] [clang] [lld] [llvm] [mlir] [RFC][AMDGPU] Add BARRIER address space (PR #209746)

Sameer Sahasrabuddhe via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Thu Jul 23 23:18:02 PDT 2026


================
@@ -2573,7 +2574,17 @@ bool AMDGPULegalizerInfo::legalizeAddrSpaceCast(
         return B.buildIntToPtr(Dst, Sub).getReg(0);
       }
 
-      // Extract low 32-bits of the pointer.
+      if (DestAS == AMDGPUAS::BARRIER) {
+        // flat -> barrier: extract the low 32 bits, then sub the barrier AS
+        // offset.
+        Register LoBits = B.buildExtract(S32, Src, 0).getReg(0);
+        Register Sub =
+            B.buildSub(S32, LoBits,
+                       B.buildConstant(S32, AMDGPUAS::BarrierAddrLDSOffset))
+                .getReg(0);
+        return B.buildIntToPtr(Dst, Sub).getReg(0);
+      }
----------------
ssahasra wrote:

I am guessing that masking out AMDGPUAS::BarrierAddrLDSOffset is cheaper than subtracting it.

https://github.com/llvm/llvm-project/pull/209746


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