[llvm-branch-commits] [clang] [lld] [llvm] [mlir] [RFC][AMDGPU] Add BARRIER address space (PR #209746)

[Sameer Sahasrabuddhe via llvm-branch-commits]

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@@ -2653,6 +2664,14 @@ bool AMDGPULegalizerInfo::legalizeAddrSpaceCast(
       if (!ApertureReg.isValid())
         return false;
 
+      if (SrcAS == AMDGPUAS::BARRIER) {
+        // barrier -> flat: add the barrier AS offset
+        SrcAsInt =
+            B.buildAdd(S32, SrcAsInt,
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ssahasra wrote:

If the sub was an AND, then this add can be an OR?

https://github.com/llvm/llvm-project/pull/209746