[llvm-branch-commits] [llvm] [AMDGPU] Simplify check for packed fp32/64 opsel bits. NFCI (PR #211374)

[Stanislav Mekhanoshin via llvm-branch-commits]

================
@@ -6266,6 +6266,20 @@ const TargetRegisterClass *SIInstrInfo::getOpRegClass(const MachineInstr &MI,
   return RegClass < 0 ? nullptr : RI.getRegClass(RegClass);
 }
 
+// Convert VOP3 operand index to source number.
+static unsigned VOP3OpIdxToSrcN(const MachineInstr &MI, unsigned OpIdx) {
+  constexpr AMDGPU::OpName OpNames[] = {
----------------
rampitec wrote:

We have map from operand index to name, but not to source number.

https://github.com/llvm/llvm-project/pull/211374