[llvm-branch-commits] [llvm] a94ef18 - [docs][Hexagon] Add 23.x release notes for Hexagon changes (NFC)

[Douglas Yung via llvm-branch-commits]

Author: Brian Cain
Date: 2026-07-22T13:58:05Z
New Revision: a94ef183551cb95b9ca59e6ea016451f17d7f553

URL: https://github.com/llvm/llvm-project/commit/a94ef183551cb95b9ca59e6ea016451f17d7f553
DIFF: https://github.com/llvm/llvm-project/commit/a94ef183551cb95b9ca59e6ea016451f17d7f553.diff

LOG: [docs][Hexagon] Add 23.x release notes for Hexagon changes (NFC)

Added: 
    

Modified: 
    clang/docs/ReleaseNotes.md
    llvm/docs/ReleaseNotes.md

Removed: 
    


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diff  --git a/clang/docs/ReleaseNotes.md b/clang/docs/ReleaseNotes.md
index 5216f8a97af66..f4043d6c64a71 100644
--- a/clang/docs/ReleaseNotes.md
+++ b/clang/docs/ReleaseNotes.md
@@ -1140,6 +1140,19 @@ latest release, please see the [Clang Web Site](https://clang.llvm.org) or the
 
 #### AVR Support
 
+#### Hexagon Support
+
+- `H2` and `QURT` are now recognized as operating systems in the Hexagon
+  target triple. The driver can build against Picolibc for H2, and a
+  `--cstdlib` flag selects Picolibc.
+- RTSan, TySan, and the CFI indirect-call sanitizer now support Hexagon.
+  `-fsanitize=type` is enabled for Hexagon Linux.
+- `-ffixed-rXX` can now reserve caller-saved registers r16-r28.
+- ShadowCallStack (`-fsanitize=shadow-call-stack`) is supported.
+- The driver passes LTO options through to the Hexagon linker invocation.
+- `_GNU_SOURCE` is predefined for Hexagon C++ compilations.
+- `__HVX_IEEE_FP__` is defined when `-mhvx-ieee-fp` is enabled.
+
 #### SystemZ Support
 
 - Add support for `#pragma export` for z/OS. This is a pragma used to export functions and variables

diff  --git a/llvm/docs/ReleaseNotes.md b/llvm/docs/ReleaseNotes.md
index a878e6e68c24a..36c8ed68cff28 100644
--- a/llvm/docs/ReleaseNotes.md
+++ b/llvm/docs/ReleaseNotes.md
@@ -237,6 +237,34 @@ Makes programs 10x faster by doing Special New Thing.
 
 ### Changes to the Hexagon Backend
 
+* v79 and later targets get code generation support for XQFloat, an
+  extended-precision floating point format, along with an extraneous
+  conversion removal pass and a post-register-allocation compliance checker.
+* IEEE HVX floating point intrinsics are automatically translated to their
+  QFloat equivalents on v79+ targets.
+* `vselect` can now be lowered for HVX.
+* Partial reduction intrinsics are now supported.
+* HVX gained V128i1/V64i1/V32i1 predicate load and store support.
+* The Machine Combiner pass is enabled for Hexagon.
+* A new AggressiveRDF copy propagation pass extends RDF copy propagation
+  with super-register and sub-register handling.
+* The HexagonGlobalScheduler pass was added.
+* ShadowCallStack (`-fsanitize=shadow-call-stack`) is now supported, along
+  with a corresponding multilib.
+* Stack clash protection can use `probe-stack=inline-asm`.
+* KCFI is now supported.
+* The CFI indirect-call sanitizer is now supported.
+* `-ffixed-rXX` can reserve caller-saved registers r16-r28.
+* A new HVX caller-save remark pass diagnoses call sites that force HVX
+  register spills.
+* Several Hexagon IR and MIR passes now emit optimization remarks.
+* XRay custom and typed events are now supported.
+* JITLink gained an ELF backend for Hexagon.
+* The `.reloc` assembler directive is now supported.
+* HVX build-vector lowering now reuses word splats for repeated words.
+* Sign-extend-then-multiply patterns are now recognized and lowered to
+  `vmpyh`.
+
 ### Changes to the LoongArch Backend
 
 * DWARF fission is now compatible with linker relaxations, allowing `-gsplit-dwarf` and `-mrelax`