[llvm-branch-commits] [llvm] release/23.x: [X86] combineShiftRightLogical - fold srl(vecreduce_umax(x), bw-1) as MOVMSK signbit reduction (#210281) (PR #210740)

Douglas Yung via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Wed Jul 22 06:54:51 PDT 2026

Previous message: [llvm-branch-commits] [llvm] release/23.x: [X86] combineShiftRightLogical - fold srl(vecreduce_umax(x), bw-1) as MOVMSK signbit reduction (#210281) (PR #210740)
Next message: [llvm-branch-commits] [llvm] release/23.x: [RISCV] Support uimm5 operands for Xqcicm cmovs in RISCVExpandPseudoInsts (#210955) (PR #211164)
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https://github.com/dyung closed https://github.com/llvm/llvm-project/pull/210740

Previous message: [llvm-branch-commits] [llvm] release/23.x: [X86] combineShiftRightLogical - fold srl(vecreduce_umax(x), bw-1) as MOVMSK signbit reduction (#210281) (PR #210740)
Next message: [llvm-branch-commits] [llvm] release/23.x: [RISCV] Support uimm5 operands for Xqcicm cmovs in RISCVExpandPseudoInsts (#210955) (PR #211164)
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