[llvm-branch-commits] [llvm] [RISC-V][MC][RVY] Add support for RVY loads/stores (PR #177073)

[Sam Elliott via llvm-branch-commits]

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@@ -264,35 +267,40 @@ let RegAltNameIndices = [ABIRegAltName] in {
   }
 }
 
-def XLenVT : ValueTypeByHwMode<[RV32, RV64],
-                               [i32,  i64]>;
+def XLenVT : ValueTypeByHwMode<[RV32I, RV64I, RV32Y, RV64Y],
+                               [i32,   i64,   i32,   i64]>;
 defvar XLenPairVT = untyped;
 
 // Allow f64 in GPR for ZDINX on RV64.
-def XLenFVT : ValueTypeByHwMode<[RV64],
-                                [f64]>;
-def XLenPairFVT : ValueTypeByHwMode<[RV32],
-                                    [f64]>;
-def XLenPairVecI8VT : ValueTypeByHwMode<[RV32],
+def XLenFVT : ValueTypeByHwMode<[DefaultMode, RV64I, RV64Y],
+                                [/*XLen*/i32, f64,   f64]>;
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lenary wrote:

Why do we need `DefaultMode` here now?

https://github.com/llvm/llvm-project/pull/177073