[llvm-branch-commits] [llvm] [AMDGPU] Fold constant offset into SV form addressing in SVS frame index fallback (PR #208629)

[Christudasan Devadasan via llvm-branch-commits]

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@@ -43,26 +51,26 @@ body:             |
     ; GFX942-NEXT: {{  $}}
     ; GFX942-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02
     ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg
-    ; GFX942-NEXT: $vgpr1 = V_MOV_B32_e32 16388, implicit $exec
-    ; GFX942-NEXT: SCRATCH_STORE_DWORD $vgpr0, $vgpr1, 0, 0, implicit $exec, implicit $flat_scr
+    ; GFX942-NEXT: $vgpr1 = V_MOV_B32_e32 16384, implicit $exec
+    ; GFX942-NEXT: SCRATCH_STORE_DWORD $vgpr0, $vgpr1, 4, 0, implicit $exec, implicit $flat_scr
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cdevadas wrote:

IIUC, this PR starts enabling non-zero imm-offset field in the SV form instructions? With that it can now accept larger offset values than it used to be. Is it true?

https://github.com/llvm/llvm-project/pull/208629