[llvm-branch-commits] [llvm] [AArch64] ldiapp for 128-bit SC load with rcpc3 (PR #208443)

[Tomas Matheson via llvm-branch-commits]

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@@ -321,12 +321,11 @@ bool AtomicExpandImpl::tryInsertTrailingSeqCstFence(Instruction *AtomicI) {
 
 template <typename AtomicInst>
 bool AtomicExpandImpl::tryInsertFencesForAtomic(AtomicInst *AtomicI,
-                                                bool OrderingRequiresFence,
-                                                AtomicOrdering NewOrdering) {
+                                                bool OrderingRequiresFence) {
   bool ShouldInsertFences = TLI->shouldInsertFencesForAtomic(AtomicI);
   if (OrderingRequiresFence && ShouldInsertFences) {
     AtomicOrdering FenceOrdering = AtomicI->getOrdering();
-    AtomicI->setOrdering(NewOrdering);
+    AtomicI->setOrdering(TLI->atomicOperationOrderAfterFenceSplit(AtomicI));
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tommat01 wrote:

I had to change this for loads, so figured I might as well make it consistent across load/store/rmw.

https://github.com/llvm/llvm-project/pull/208443