[llvm-branch-commits] [llvm] AMDGPU: Fold inline immediates in peephole-opt (PR #208423)

[Frederik Harwath via llvm-branch-commits]

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@@ -3899,9 +3915,41 @@ bool SIInstrInfo::foldImmediate(MachineInstr &UseMI, MachineInstr &DefMI,
 
       return true;
     }
+
+    return false;
   }
 
-  return false;
+  // Early exit for generic instructions which will never fold an immediate.
+  if (!isTargetSpecificOpcode(UseMI.getOpcode()))
+    return false;
+
+  // Directly fold inline immediates into the uses. These should be free-ish
+  // regardless of the uses.
+  bool FoldedInlineImm = false;
+
+  for (MachineOperand &UseMO : UseMI.explicit_uses()) {
+    if (!UseMO.isReg() || UseMO.getReg() != Reg)
+      continue;
+
+    unsigned UseOpIdx = UseMO.getOperandNo();
+
+    int64_t ImmVal = Imm;
+    if (unsigned UseSubReg = UseMO.getSubReg()) {
+      std::optional<int64_t> SubImm = extractSubregFromImm(Imm, UseSubReg);
+      if (!SubImm)
+        continue;
+      ImmVal = *SubImm;
+    }
+
+    if (!isInlineConstant(UseMI, UseOpIdx, ImmVal))
----------------
frederik-h wrote:

Does this also need to check for `hasNoF16PseudoScalarTransInlineConstants`? `isOperandLegal` does check this for inline constants, but `isInlineConstant` does not. The machine verifier also does not seem to reject it. In a test case that I created, I see it folding a `-1`  value into ` V_S_EXP_F16_e64` on gfx1250 whereas it stops folding if I skip this optimization on `hasNoF16PseudoScalarTransInlineConstants`. 

https://github.com/llvm/llvm-project/pull/208423