[llvm-branch-commits] [llvm] [AMDGPU] Add FUNC_WAVE32 for object linking info flag (PR #207633)
via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Sun Jul 5 18:50:29 PDT 2026
llvmorg-github-actions[bot] wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-amdgpu
Author: Shilei Tian (shiltian)
<details>
<summary>Changes</summary>
---
Full diff: https://github.com/llvm/llvm-project/pull/207633.diff
8 Files Affected:
- (modified) llvm/docs/AMDGPUUsage.rst (+1)
- (modified) llvm/include/llvm/Support/AMDGPUObjLinkingInfo.h (+3-1)
- (modified) llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp (+1)
- (modified) llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp (+1)
- (modified) llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp (+4)
- (modified) llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h (+1)
- (modified) llvm/test/CodeGen/AMDGPU/lds-link-time-codegen.ll (+17-17)
- (modified) llvm/test/MC/AMDGPU/amdgpu-info-roundtrip.s (+5-5)
``````````diff
diff --git a/llvm/docs/AMDGPUUsage.rst b/llvm/docs/AMDGPUUsage.rst
index 69a3cc894c13f..1556dd990e464 100644
--- a/llvm/docs/AMDGPUUsage.rst
+++ b/llvm/docs/AMDGPUUsage.rst
@@ -3250,6 +3250,7 @@ if needed.
0x2 ``FUNC_USES_FLAT_SCRATCH`` Function uses flat scratch addressing
0x4 ``FUNC_HAS_DYN_STACK`` Function has dynamic stack allocation
0x8 ``FUNC_WGP_MODE`` Function uses WGP execution mode
+ 0x10 ``FUNC_WAVE32`` Function uses wave32; otherwise wave64
===== =========================== ==========================================
Symbol references (``INFO_FUNC``, ``INFO_USE``, ``INFO_CALL``) generate
diff --git a/llvm/include/llvm/Support/AMDGPUObjLinkingInfo.h b/llvm/include/llvm/Support/AMDGPUObjLinkingInfo.h
index 7d36eb08fa620..5db9a65ca6e78 100644
--- a/llvm/include/llvm/Support/AMDGPUObjLinkingInfo.h
+++ b/llvm/include/llvm/Support/AMDGPUObjLinkingInfo.h
@@ -70,7 +70,9 @@ enum class FuncInfoFlags : uint32_t {
FUNC_HAS_DYN_STACK = 1U << 2,
/// Function uses WGP mode. If unset, the function uses CU mode.
FUNC_WGP_MODE = 1U << 3,
- LLVM_MARK_AS_BITMASK_ENUM(/*LargestValue=*/FUNC_WGP_MODE),
+ /// Function uses wave32. If unset, the function uses wave64.
+ FUNC_WAVE32 = 1U << 4,
+ LLVM_MARK_AS_BITMASK_ENUM(/*LargestValue=*/FUNC_WAVE32),
};
} // namespace AMDGPU
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
index 10e9d5414353c..57ebd6a3f707d 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
@@ -959,6 +959,7 @@ bool AMDGPUAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
/*PrivateSegmentSize=*/static_cast<uint32_t>(RU.PrivateSegmentSize),
/*Occupancy=*/Occupancy,
/*UsesWgpMode=*/STM.supportsWGP() && !STM.isCuModeEnabled(),
+ /*UsesWave32=*/STM.getWavefrontSize() == 32,
/*UsesVCC=*/RU.UsesVCC,
/*UsesFlatScratch=*/RU.UsesFlatScratch,
/*HasDynStack=*/RU.HasDynamicallySizedStack,
diff --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
index 55150cae4a253..c76465cdefc7e 100644
--- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
@@ -6906,6 +6906,7 @@ bool AMDGPUAsmParser::ParseDirectiveAMDGPUInfo() {
!!(Flags & AMDGPU::FuncInfoFlags::FUNC_USES_FLAT_SCRATCH);
FI.HasDynStack = !!(Flags & AMDGPU::FuncInfoFlags::FUNC_HAS_DYN_STACK);
FI.UsesWgpMode = !!(Flags & AMDGPU::FuncInfoFlags::FUNC_WGP_MODE);
+ FI.UsesWave32 = !!(Flags & AMDGPU::FuncInfoFlags::FUNC_WAVE32);
HasScalarAttrs = true;
} else if (Dir == "num_sgpr") {
int64_t Val;
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
index bbc9a7def0d77..0a22af065e1ec 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
@@ -753,6 +753,8 @@ void AMDGPUTargetAsmStreamer::emitAMDGPUInfo(
Flags |= AMDGPU::FuncInfoFlags::FUNC_HAS_DYN_STACK;
if (Info->UsesWgpMode)
Flags |= AMDGPU::FuncInfoFlags::FUNC_WGP_MODE;
+ if (Info->UsesWave32)
+ Flags |= AMDGPU::FuncInfoFlags::FUNC_WAVE32;
OS << "\t\t.amdgpu_flags " << llvm::to_underlying(Flags) << '\n';
OS << "\t\t.amdgpu_num_sgpr " << Info->NumSGPR << '\n';
OS << "\t\t.amdgpu_num_vgpr " << Info->NumArchVGPR << '\n';
@@ -1229,6 +1231,8 @@ void AMDGPUTargetELFStreamer::emitAMDGPUInfo(
Flags |= AMDGPU::FuncInfoFlags::FUNC_HAS_DYN_STACK;
if (Info->UsesWgpMode)
Flags |= AMDGPU::FuncInfoFlags::FUNC_WGP_MODE;
+ if (Info->UsesWave32)
+ Flags |= AMDGPU::FuncInfoFlags::FUNC_WAVE32;
EmitU32Entry(AMDGPU::InfoKind::INFO_FLAGS, llvm::to_underlying(Flags));
EmitU32Entry(AMDGPU::InfoKind::INFO_NUM_SGPR, Info->NumSGPR);
EmitU32Entry(AMDGPU::InfoKind::INFO_NUM_VGPR, Info->NumArchVGPR);
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h
index 581bc185b24c9..49d12f5b470be 100644
--- a/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h
+++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h
@@ -37,6 +37,7 @@ struct FuncInfo {
uint32_t PrivateSegmentSize = 0;
uint32_t Occupancy = 0;
bool UsesWgpMode = false;
+ bool UsesWave32 = false;
bool UsesVCC = false;
bool UsesFlatScratch = false;
bool HasDynStack = false;
diff --git a/llvm/test/CodeGen/AMDGPU/lds-link-time-codegen.ll b/llvm/test/CodeGen/AMDGPU/lds-link-time-codegen.ll
index 646248bbbf97b..98d98ab5ed578 100644
--- a/llvm/test/CodeGen/AMDGPU/lds-link-time-codegen.ll
+++ b/llvm/test/CodeGen/AMDGPU/lds-link-time-codegen.ll
@@ -1,9 +1,9 @@
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -amdgpu-enable-object-linking < %s | FileCheck -check-prefixes=ASM %s --implicit-check-not=.amdgpu_num_agpr
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -amdgpu-enable-object-linking -filetype=obj < %s | llvm-readobj -r --syms --sections - | FileCheck -check-prefixes=ELF %s
-; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -amdgpu-enable-object-linking -filetype=asm < %s | FileCheck -check-prefixes=WGP %s
-; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -mattr=+wavefrontsize64 -amdgpu-enable-object-linking -filetype=asm < %s | FileCheck -check-prefixes=WGP %s
-; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -mattr=+cumode -amdgpu-enable-object-linking -filetype=asm < %s | FileCheck -check-prefixes=CU %s
-; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -mattr=+cumode,+wavefrontsize64 -amdgpu-enable-object-linking -filetype=asm < %s | FileCheck -check-prefixes=CU %s
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -amdgpu-enable-object-linking -filetype=asm < %s | FileCheck -check-prefixes=WGP-WAVE32 %s
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -mattr=+wavefrontsize64 -amdgpu-enable-object-linking -filetype=asm < %s | FileCheck -check-prefixes=WGP-WAVE64 %s
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -mattr=+cumode -amdgpu-enable-object-linking -filetype=asm < %s | FileCheck -check-prefixes=CU-WAVE32 %s
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -mattr=+cumode,+wavefrontsize64 -amdgpu-enable-object-linking -filetype=asm < %s | FileCheck -check-prefixes=CU-WAVE64 %s
; Test that with object linking enabled, external LDS declarations produce
; @abs32 at lo relocations, SHN_AMDGPU_LDS symbols, .amdgpu_lds directives,
@@ -42,19 +42,19 @@
; ASM-DAG: .amdgpu_call device_func
; ASM-DAG: .end_amdgpu_info
-; COM: FUNC_WGP_MODE (0x8): WGP mode is the default on a WGP-capable target
-; COM: (gfx11), so the flag is set on every function; +cumode selects CU mode
-; COM: and clears it. Checked for both +wavefrontsize32 (default) and
-; COM: +wavefrontsize64.
-; WGP: .amdgpu_info device_func
-; WGP-NEXT: .amdgpu_flags 8
-; WGP: .amdgpu_info test_kernel
-; WGP-NEXT: .amdgpu_flags 8
-
-; CU: .amdgpu_info device_func
-; CU-NEXT: .amdgpu_flags 0
-; CU: .amdgpu_info test_kernel
-; CU-NEXT: .amdgpu_flags 0
+; COM: FUNC_WGP_MODE (0x8) and FUNC_WAVE32 (0x10) track the subtarget execution
+; COM: mode and wave size. gfx11 defaults to WGP mode + wave32; +cumode selects
+; COM: CU mode and +wavefrontsize64 selects wave64. The kernel and the device
+; COM: function share the same subtarget-derived flags, so both .amdgpu_flags
+; COM: entries carry the same value in each run.
+; COM: WGP | WAVE32 = 0x8 | 0x10 = 24.
+; WGP-WAVE32-COUNT-2: .amdgpu_flags 24
+; COM: WGP only = 0x8 = 8.
+; WGP-WAVE64-COUNT-2: .amdgpu_flags 8
+; COM: WAVE32 only = 0x10 = 16.
+; CU-WAVE32-COUNT-2: .amdgpu_flags 16
+; COM: neither set = 0.
+; CU-WAVE64-COUNT-2: .amdgpu_flags 0
; SHN_AMDGPU_LDS directives.
; ASM-DAG: .amdgpu_lds lds_large, 256, 16
diff --git a/llvm/test/MC/AMDGPU/amdgpu-info-roundtrip.s b/llvm/test/MC/AMDGPU/amdgpu-info-roundtrip.s
index 85ba86d5918d7..87768c81c240b 100644
--- a/llvm/test/MC/AMDGPU/amdgpu-info-roundtrip.s
+++ b/llvm/test/MC/AMDGPU/amdgpu-info-roundtrip.s
@@ -31,11 +31,11 @@ addr_taken_func:
.globl extern_func
-// COM: Kernel: flags=15 (VCC|FLAT_SCRATCH|HAS_DYN_STACK|WGP_MODE), resources,
-// COM: call edge, use edge, indirect call, and type ID. Non-zero AGPR to verify
-// COM: conditional emission.
+// COM: Kernel: flags=31 (VCC|FLAT_SCRATCH|HAS_DYN_STACK|WGP_MODE|WAVE32),
+// COM: resources, call edge, use edge, indirect call, and type ID. Non-zero AGPR
+// COM: to verify conditional emission.
.amdgpu_info my_kernel
- .amdgpu_flags 15
+ .amdgpu_flags 31
.amdgpu_num_sgpr 33
.amdgpu_num_vgpr 32
.amdgpu_num_agpr 4
@@ -69,7 +69,7 @@ addr_taken_func:
.end_amdgpu_info
// ASM: .amdgpu_info my_kernel
-// ASM: .amdgpu_flags 15
+// ASM: .amdgpu_flags 31
// ASM: .amdgpu_num_sgpr 33
// ASM: .amdgpu_num_vgpr 32
// ASM: .amdgpu_num_agpr 4
``````````
</details>
https://github.com/llvm/llvm-project/pull/207633
More information about the llvm-branch-commits
mailing list