[llvm-branch-commits] [llvm] AMDGPU: Implement computeKnownFPClass for llvm.amdgcn.trig.preop (PR #179026)
Matt Arsenault via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Sat Jan 31 01:19:55 PST 2026
https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/179026
Surprisingly this doesn't consider the special cases, and literally
just extracts the exponent and proceeds as normal.
>From c700c2d4663daa80989525f0d5d74bc442ce2af5 Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: Sat, 31 Jan 2026 09:48:27 +0100
Subject: [PATCH] AMDGPU: Implement computeKnownFPClass for
llvm.amdgcn.trig.preop
Surprisingly this doesn't consider the special cases, and literally
just extracts the exponent and proceeds as normal.
---
llvm/lib/Analysis/ValueTracking.cpp | 4 ++++
.../Attributor/AMDGPU/nofpclass-amdgcn-trig-preop.ll | 12 ++++++++++++
2 files changed, 16 insertions(+)
create mode 100644 llvm/test/Transforms/Attributor/AMDGPU/nofpclass-amdgcn-trig-preop.ll
diff --git a/llvm/lib/Analysis/ValueTracking.cpp b/llvm/lib/Analysis/ValueTracking.cpp
index b0d640e33cc28..285e4655804e8 100644
--- a/llvm/lib/Analysis/ValueTracking.cpp
+++ b/llvm/lib/Analysis/ValueTracking.cpp
@@ -5534,6 +5534,10 @@ void computeKnownFPClass(const Value *V, const APInt &DemandedElts,
break;
}
+ case Intrinsic::amdgcn_trig_preop: {
+ Known.knownNot(fcNan | fcInf);
+ break;
+ }
default:
break;
}
diff --git a/llvm/test/Transforms/Attributor/AMDGPU/nofpclass-amdgcn-trig-preop.ll b/llvm/test/Transforms/Attributor/AMDGPU/nofpclass-amdgcn-trig-preop.ll
new file mode 100644
index 0000000000000..170da3010cceb
--- /dev/null
+++ b/llvm/test/Transforms/Attributor/AMDGPU/nofpclass-amdgcn-trig-preop.ll
@@ -0,0 +1,12 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
+; RUN: opt -S -passes=attributor -attributor-manifest-internal < %s | FileCheck %s
+
+define double @ret_trig_preop_f64(double %x, i32 %n) {
+; CHECK-LABEL: define nofpclass(nan inf) double @ret_trig_preop_f64(
+; CHECK-SAME: double [[X:%.*]], i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] {
+; CHECK-NEXT: [[RET:%.*]] = call nofpclass(nan inf) double @llvm.amdgcn.trig.preop.f64(double [[X]], i32 [[N]]) #[[ATTR2:[0-9]+]]
+; CHECK-NEXT: ret double [[RET]]
+;
+ %ret = call double @llvm.amdgcn.trig.preop.f64(double %x, i32 %n)
+ ret double %ret
+}
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