[llvm-branch-commits] [llvm] [AMDGPU][GlobalISel] Add RegBankLegalize rules for amdgcn.class (PR #178827)
Matt Arsenault via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Fri Jan 30 00:56:30 PST 2026
================
@@ -75,14 +82,19 @@ define amdgpu_kernel void @class_f16_fabs(
;
; VI-GISEL-LABEL: class_f16_fabs:
; VI-GISEL: ; %bb.0: ; %entry
-; VI-GISEL-NEXT: s_load_dword s3, s[8:9], 0x28
-; VI-GISEL-NEXT: s_load_dword s4, s[8:9], 0x4c
+; VI-GISEL-NEXT: s_load_dword s3, s[8:9], 0x4c
+; VI-GISEL-NEXT: s_load_dword s4, s[8:9], 0x28
; VI-GISEL-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0
; VI-GISEL-NEXT: s_mov_b32 s2, -1
; VI-GISEL-NEXT: s_waitcnt lgkmcnt(0)
; VI-GISEL-NEXT: v_mov_b32_e32 v0, s3
-; VI-GISEL-NEXT: v_cmp_class_f16_e64 s[4:5], |v0|, s4
-; VI-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, -1, s[4:5]
+; VI-GISEL-NEXT: v_cmp_class_f16_e64 s[4:5], |s4|, v0
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arsenm wrote:
This is really ugly
https://github.com/llvm/llvm-project/pull/178827
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