llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-amdgpu
Author: Shilei Tian (shiltian)
<details>
<summary>Changes</summary>
We can finally get rid of the manually defined boolean variables, like other targets. Even though most of them are now defined by macros, we still need to add the entries.
---
Patch is 22.19 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/177402.diff
1 Files Affected:
- (modified) llvm/lib/Target/AMDGPU/GCNSubtarget.h (+13-282)
``````````diff
diff --git a/llvm/lib/Target/AMDGPU/GCNSubtarget.h b/llvm/lib/Target/AMDGPU/GCNSubtarget.h
index f4ecdbde4703f..8d069a67f3a43 100644
--- a/llvm/lib/Target/AMDGPU/GCNSubtarget.h
+++ b/llvm/lib/Target/AMDGPU/GCNSubtarget.h
@@ -26,227 +26,6 @@
#define GET_SUBTARGETINFO_HEADER
#include "AMDGPUGenSubtargetInfo.inc"
-//===----------------------------------------------------------------------===//
-// X-Macros for simple subtarget features.
-//
-// GCN_SUBTARGET_HAS_FEATURE_MEMBER_ONLY: Features with member only (no getter)
-// bool HasXXX = false; // member declaration only
-//
-// GCN_SUBTARGET_HAS_FEATURE: Features with both member and getter
-// bool HasXXX = false; // member declaration
-// bool hasXXX() const { return HasXXX; } // getter
-//
-// To add a new simple feature:
-// 1. Add X(FeatureName) to the appropriate macro below
-// 2. Remove the manual bool HasFeatureName declaration from protected section
-// 3. If using GCN_SUBTARGET_HAS_FEATURE, also remove the manual getter
-//
-// Note: The features are ordered alphabetically for convenience. Preferably
-// this would be generated automatically by TableGen, but there are some cases
-// where the features were not defined in a way that was compatible with the
-// auto-generation.
-//===----------------------------------------------------------------------===//
-
-// Features with member only (no getter generated).
-// These features either have custom getters or code accesses the member
-// directly.
-#define GCN_SUBTARGET_HAS_FEATURE_MEMBER_ONLY(X) \
- X(AssemblerPermissiveWavesize) \
- X(CIInsts) \
- X(FastDenormalF32) \
- X(GCN3Encoding) \
- X(GFX10Insts) \
- X(GFX11Insts) \
- X(GFX12Insts) \
- X(GFX7GFX8GFX9Insts) \
- X(GFX8Insts) \
- X(GFX9Insts) \
- X(LDSMisalignedBug) \
- X(UnalignedBufferAccess) \
- X(UnalignedScratchAccess) \
- X(UserSGPRInit16Bug)
-
-// Features with both member and getter.
-#define GCN_SUBTARGET_HAS_FEATURE(X) \
- X(1_5xVGPRs) \
- X(1024AddressableVGPRs) \
- X(45BitNumRecordsBufferResource) \
- X(AutoWaitcntBeforeBarrier) \
- X(64BitLiterals) \
- X(A16) \
- X(AddMinMaxInsts) \
- X(AddNoCarryInsts) \
- X(AddSubU64Insts) \
- X(AgentScopeFineGrainedRemoteMemoryAtomics) \
- X(ApertureRegs) \
- X(ArchitectedFlatScratch) \
- X(ArchitectedSGPRs) \
- X(AshrPkInsts) \
- X(AtomicBufferGlobalPkAddF16Insts) \
- X(AtomicBufferGlobalPkAddF16NoRtnInsts) \
- X(AtomicBufferPkAddBF16Inst) \
- X(AtomicCSubNoRtnInsts) \
- X(AtomicDsPkAdd16Insts) \
- X(AtomicFaddNoRtnInsts) \
- X(AtomicFaddRtnInsts) \
- X(AtomicFlatPkAdd16Insts) \
- X(AtomicFMinFMaxF32FlatInsts) \
- X(AtomicFMinFMaxF32GlobalInsts) \
- X(AtomicFMinFMaxF64FlatInsts) \
- X(AtomicFMinFMaxF64GlobalInsts) \
- X(AtomicGlobalPkAddBF16Inst) \
- X(BackOffBarrier) \
- X(BitOp3Insts) \
- X(BVHDualAndBVH8Insts) \
- X(Clusters) \
- X(CubeInsts) \
- X(CvtFP8VOP1Bug) \
- X(CvtNormInsts) \
- X(CvtPkNormVOP2Insts) \
- X(CvtPkNormVOP3Insts) \
- X(DefaultComponentBroadcast) \
- X(DefaultComponentZero) \
- X(DLInsts) \
- X(Dot10Insts) \
- X(Dot11Insts) \
- X(Dot12Insts) \
- X(Dot13Insts) \
- X(Dot1Insts) \
- X(Dot2Insts) \
- X(Dot3Insts) \
- X(Dot4Insts) \
- X(Dot5Insts) \
- X(Dot6Insts) \
- X(Dot7Insts) \
- X(Dot8Insts) \
- X(Dot9Insts) \
- X(DPALU_DPP) \
- X(DPP) \
- X(DPP8) \
- X(DPPSrc1SGPR) \
- X(EmulatedSystemScopeAtomics) \
- X(ExtendedImageInsts) \
- X(FlatAddressSpace) \
- X(FlatAtomicFaddF32Inst) \
- X(FlatBufferGlobalAtomicFaddF64Inst) \
- X(FlatGlobalInsts) \
- X(FlatGVSMode) \
- X(FlatInstOffsets) \
- X(FlatScratchInsts) \
- X(FlatSegmentOffsetBug) \
- X(FMA) \
- X(FmacF64Inst) \
- X(FmaMixBF16Insts) \
- X(FmaMixInsts) \
- X(FP64) \
- X(FP8ConversionInsts) \
- X(FP8E5M3Insts) \
- X(FP8Insts) \
- X(FullRate64Ops) \
- X(G16) \
- X(GDS) \
- X(GetWaveIdInst) \
- X(GFX10_3Insts) \
- X(GFX10_AEncoding) \
- X(GFX10_BEncoding) \
- X(GFX1250Insts) \
- X(GFX90AInsts) \
- X(GFX940Insts) \
- X(GFX950Insts) \
- X(GloballyAddressableScratch) \
- X(GWS) \
- X(HalfRate64Ops) \
- X(IEEEMinimumMaximumInsts) \
- X(ImageGather4D16Bug) \
- X(ImageInsts) \
- X(ImageStoreD16Bug) \
- X(InstFwdPrefetchBug) \
- X(IntClamp) \
- X(KernargPreload) \
- X(LdsBarrierArriveAtomic) \
- X(LdsBranchVmemWARHazard) \
- X(LerpInst) \
- X(LshlAddU64Inst) \
- X(MADIntraFwdBug) \
- X(MadU32Inst) \
- X(MAIInsts) \
- X(McastLoadInsts) \
- X(MemoryAtomicFaddF32DenormalSupport) \
- X(MFMAInlineLiteralBug) \
- X(MIMG_R128) \
- X(Min3Max3PKF16) \
- X(Minimum3Maximum3F16) \
- X(Minimum3Maximum3F32) \
- X(Minimum3Maximum3PKF16) \
- X(Movrel) \
- X(MSAALoadDstSelBug) \
- X(NegativeScratchOffsetBug) \
- X(NegativeUnalignedScratchOffsetBug) \
- X(NoDataDepHazard) \
- X(NoSdstCMPX) \
- X(NSAClauseBug) \
- X(NSAEncoding) \
- X(NSAtoVMEMBug) \
- X(Offset3fBug) \
- X(PackedFP32Ops) \
- X(PackedTID) \
- X(PartialNSAEncoding) \
- X(Permlane16Swap) \
- X(Permlane32Swap) \
- X(PkAddMinMaxInsts) \
- X(PkFmacF16Inst) \
- X(PointSampleAccel) \
- X(PrivEnabledTrap2NopBug) \
- X(PrngInst) \
- X(PseudoScalarTrans) \
- X(QsadInsts) \
- X(R128A16) \
- X(RelaxedBufferOOBMode) \
- X(RequiredExportPriority) \
- X(RestrictedSOffset) \
- X(SadInsts) \
- X(SafeCUPrefetch) \
- X(SafeSmemPrefetch) \
- X(SALUFloatInsts) \
- X(ScalarAtomics) \
- X(ScalarDwordx3Loads) \
- X(ScalarFlatScratchInsts) \
- X(ScalarStores) \
- X(SDWAMac) \
- X(SDWAOmod) \
- X(SDWAOutModsVOPC) \
- X(SDWAScalar) \
- X(SDWASdst) \
- X(SetPrioIncWgInst) \
- X(SetregVGPRMSBFixup) \
- X(SGPRInitBug) \
- X(ShaderCyclesHiLoRegisters) \
- X(ShaderCyclesRegister) \
- X(SMemRealTime) \
- X(SMemTimeInst) \
- X(SMEMtoVectorWriteHazard) \
- X(SWakeupBarrier) \
- X(TanhInsts) \
- X(TensorCvtLutInsts) \
- X(TransposeLoadF4F6Insts) \
- X(TrapHandler) \
- X(UnalignedAccessMode) \
- X(UnalignedDSAccess) \
- X(UnpackedD16VMem) \
- X(VALUTransUseHazard) \
- X(VcmpxExecWARHazard) \
- X(VcmpxPermlaneHazard) \
- X(VGPRIndexMode) \
- X(VmemPrefInsts) \
- X(VMemToLDSLoad) \
- X(VMEMtoScalarWriteHazard) \
- X(VmemWriteVgprInOrder) \
- X(VOP3Literal) \
- X(VOPDInsts) \
- X(Vscnt) \
- X(WaitXcnt) \
- X(XF32Insts)
-
namespace llvm {
class GCNTargetMachine;
@@ -297,38 +76,9 @@ class GCNSubtarget final : public AMDGPUGenSubtargetInfo,
/// indicates a lack of S_CLAUSE support.
unsigned MaxHardClauseLength = 0;
- //===--------------------------------------------------------------------===//
- /// Controlled by subtarget features defined in AMDGPU.td
- //===--------------------------------------------------------------------===//
- bool DumpCode = false;
- bool EnableCuMode = false;
- bool EnableDS128 = false;
- bool EnableFlatScratch = false;
- bool EnableLoadStoreOpt = false;
- bool EnablePreciseMemory = false;
- bool EnablePRTStrictNull = false;
- bool EnableSIScheduler = false;
- // This should not be used directly. 'TargetID' tracks the dynamic settings
- // for SRAMECC.
- bool EnableSRAMECC = false;
- bool EnableTgSplit = false;
- bool EnableUnsafeDSOffsetFolding = false;
- bool EnableXNACK = false;
- bool RequiresAlignVGPR = false;
- bool RequiresCOV6 = false;
- bool RequiresWaitsBeforeSystemScopeStores = false;
- bool SupportsSRAMECC = false;
- // This should not be used directly. 'TargetID' tracks the dynamic settings
- // for XNACK.
- bool SupportsXNACK = false;
- bool UseAddPC64Inst = false;
- bool UseBlockVGPROpsForCSR = false;
- bool UseFlatForGlobal = false;
-
-#define DECL_HAS_MEMBER(Name) bool Has##Name = false;
- GCN_SUBTARGET_HAS_FEATURE(DECL_HAS_MEMBER)
- GCN_SUBTARGET_HAS_FEATURE_MEMBER_ONLY(DECL_HAS_MEMBER)
-#undef DECL_HAS_MEMBER
+#define GET_SUBTARGETINFO_MACRO(ATTRIBUTE, DEFAULT, GETTER) \
+ bool ATTRIBUTE = DEFAULT;
+#include "AMDGPUGenSubtargetInfo.inc"
private:
SIInstrInfo InstrInfo;
@@ -391,19 +141,14 @@ class GCNSubtarget final : public AMDGPUGenSubtargetInfo,
void ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS);
- // Simple subtarget feature getters - auto-generated from X-macro.
- // Note: GCN_SUBTARGET_HAS_FEATURE_MEMBER_ONLY features don't get getters.
-#define DECL_HAS_GETTER(Name) \
- bool has##Name() const { return Has##Name; }
- GCN_SUBTARGET_HAS_FEATURE(DECL_HAS_GETTER)
-#undef DECL_HAS_GETTER
-#undef GCN_SUBTARGET_HAS_FEATURE
-#undef GCN_SUBTARGET_HAS_FEATURE_MEMBER_ONLY
-
Generation getGeneration() const { return (Generation)Gen; }
bool isGFX11Plus() const { return getGeneration() >= GFX11; }
+#define GET_SUBTARGETINFO_MACRO(ATTRIBUTE, DEFAULT, GETTER) \
+ bool GETTER() const { return ATTRIBUTE; }
+#include "AMDGPUGenSubtargetInfo.inc"
+
unsigned getMaxWaveScratchSize() const {
// See COMPUTE_TMPRING_SIZE.WAVESIZE.
if (getGeneration() >= GFX12) {
@@ -523,8 +268,6 @@ class GCNSubtarget final : public AMDGPUGenSubtargetInfo,
return getGeneration() <= SEA_ISLANDS ? 1 : 2;
}
- bool dumpCode() const { return DumpCode; }
-
/// Return the amount of LDS that can be used that will not restrict the
/// occupancy lower than WaveCount.
unsigned getMaxLocalMemSizeWithWaveCount(unsigned WaveCount,
@@ -539,8 +282,6 @@ class GCNSubtarget...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/177402