[llvm-branch-commits] [llvm] [RISC-V][MC] Introduce initial support for RVY (CHERI) (PR #176871)
Alexander Richardson via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Wed Jan 21 11:04:15 PST 2026
================
@@ -78,44 +78,24 @@ LLVMInitializeRISCVDisassembler() {
createRISCVDisassembler);
}
-static DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, uint32_t RegNo,
- uint64_t Address,
- const MCDisassembler *Decoder) {
- bool IsRVE = Decoder->getSubtargetInfo().hasFeature(RISCV::FeatureStdExtE);
-
- if (RegNo >= 32 || (IsRVE && RegNo >= 16))
- return MCDisassembler::Fail;
-
- MCRegister Reg = RISCV::X0 + RegNo;
- Inst.addOperand(MCOperand::createReg(Reg));
- return MCDisassembler::Success;
-}
-
-static DecodeStatus DecodeGPRF16RegisterClass(MCInst &Inst, uint32_t RegNo,
- uint64_t Address,
- const MCDisassembler *Decoder) {
+template <unsigned BaseReg>
+static DecodeStatus decodeGPRLikeRC(MCInst &Inst, uint32_t RegNo,
+ uint64_t Address,
+ const MCDisassembler *Decoder) {
bool IsRVE = Decoder->getSubtargetInfo().hasFeature(RISCV::FeatureStdExtE);
if (RegNo >= 32 || (IsRVE && RegNo >= 16))
return MCDisassembler::Fail;
- MCRegister Reg = RISCV::X0_H + RegNo;
+ MCRegister Reg = BaseReg + RegNo;
Inst.addOperand(MCOperand::createReg(Reg));
return MCDisassembler::Success;
}
-static DecodeStatus DecodeGPRF32RegisterClass(MCInst &Inst, uint32_t RegNo,
- uint64_t Address,
- const MCDisassembler *Decoder) {
- bool IsRVE = Decoder->getSubtargetInfo().hasFeature(RISCV::FeatureStdExtE);
-
- if (RegNo >= 32 || (IsRVE && RegNo >= 16))
- return MCDisassembler::Fail;
-
- MCRegister Reg = RISCV::X0_W + RegNo;
- Inst.addOperand(MCOperand::createReg(Reg));
- return MCDisassembler::Success;
-}
+constexpr auto DecodeGPRRegisterClass = decodeGPRLikeRC<RISCV::X0>;
----------------
arichardson wrote:
Should I split out this code deduplication into a separate commit? I just included it here since I didn't feel like copy-pasting the same thing for a fourth time.
https://github.com/llvm/llvm-project/pull/176871
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