[llvm-branch-commits] [llvm] [CodeGen][NPM] Isolate CanonicalizeFreezeInLoopsPass into a different adaptor (PR #176690)
Vikram Hegde via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Tue Jan 20 22:14:18 PST 2026
https://github.com/vikramRH updated https://github.com/llvm/llvm-project/pull/176690
>From c9307ae3c71c1c3e1fc4d892d874f29a74967233 Mon Sep 17 00:00:00 2001
From: vikhegde <vikram.hegde at amd.com>
Date: Fri, 16 Jan 2026 12:22:47 +0530
Subject: [PATCH] [CodeGen][NPM] Isolate CanonicalizeFreezeInLoopsPass into a
different adaptor
---
llvm/include/llvm/Passes/CodeGenPassBuilder.h | 7 ++++++-
llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll | 8 ++++----
llvm/test/CodeGen/X86/llc-pipeline-npm.ll | 8 ++++----
3 files changed, 14 insertions(+), 9 deletions(-)
diff --git a/llvm/include/llvm/Passes/CodeGenPassBuilder.h b/llvm/include/llvm/Passes/CodeGenPassBuilder.h
index 3b6abd993b5b6..654f1072d6cef 100644
--- a/llvm/include/llvm/Passes/CodeGenPassBuilder.h
+++ b/llvm/include/llvm/Passes/CodeGenPassBuilder.h
@@ -702,8 +702,13 @@ void CodeGenPassBuilder<Derived, TargetMachineT>::addIRPasses(
// Run loop strength reduction before anything else.
if (getOptLevel() != CodeGenOptLevel::None && !Opt.DisableLSR) {
+ // Canonicalize freeze inst pass does not use/preserve MSSA.
+ addFunctionPass(
+ createFunctionToLoopPassAdaptor(CanonicalizeFreezeInLoopsPass(),
+ /*UseMemorySSA=*/false),
+ PMW);
+
LoopPassManager LPM;
- LPM.addPass(CanonicalizeFreezeInLoopsPass());
LPM.addPass(LoopStrengthReducePass());
if (Opt.EnableLoopTermFold)
LPM.addPass(LoopTermFoldPass());
diff --git a/llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll b/llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
index 53deff835346a..0bbb857d94bb9 100644
--- a/llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
+++ b/llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
@@ -125,8 +125,8 @@
; GCN-O2-NEXT:amdgpu-codegenprepare
; GCN-O2-NEXT:loop-mssa(licm<allowspeculation>)
; GCN-O2-NEXT:verify
-; GCN-O2-NEXT:loop-mssa(canon-freeze
-; GCN-O2-NEXT:loop-reduce)
+; GCN-O2-NEXT:loop(canon-freeze)
+; GCN-O2-NEXT:loop-mssa(loop-reduce)
; GCN-O2-NEXT:mergeicmps
; GCN-O2-NEXT:expand-memcmp
; GCN-O2-NEXT:unreachableblockelim
@@ -297,8 +297,8 @@
; GCN-O3-NEXT:amdgpu-codegenprepare
; GCN-O3-NEXT:loop-mssa(licm<allowspeculation>)
; GCN-O3-NEXT:verify
-; GCN-O3-NEXT:loop-mssa(canon-freeze
-; GCN-O3-NEXT:loop-reduce)
+; GCN-O3-NEXT:loop(canon-freeze)
+; GCN-O3-NEXT:loop-mssa(loop-reduce)
; GCN-O3-NEXT:mergeicmps
; GCN-O3-NEXT:expand-memcmp
; GCN-O3-NEXT:unreachableblockelim
diff --git a/llvm/test/CodeGen/X86/llc-pipeline-npm.ll b/llvm/test/CodeGen/X86/llc-pipeline-npm.ll
index d1bb666b9f423..3b93ca3b22e1f 100644
--- a/llvm/test/CodeGen/X86/llc-pipeline-npm.ll
+++ b/llvm/test/CodeGen/X86/llc-pipeline-npm.ll
@@ -78,8 +78,8 @@
; O2-NEXT: x86-lower-amx-intrinsics
; O2-NEXT: x86-lower-amx-type
; O2-NEXT: verify
-; O2-NEXT: loop-mssa(canon-freeze
-; O2-NEXT: loop-reduce)
+; O2-NEXT: loop(canon-freeze)
+; O2-NEXT: loop-mssa(loop-reduce)
; O2-NEXT: mergeicmps
; O2-NEXT: expand-memcmp
; O2-NEXT: gc-lowering)
@@ -249,8 +249,8 @@
; O3-WINDOWS-NEXT: x86-lower-amx-intrinsics
; O3-WINDOWS-NEXT: x86-lower-amx-type
; O3-WINDOWS-NEXT: verify
-; O3-WINDOWS-NEXT: loop-mssa(canon-freeze
-; O3-WINDOWS-NEXT: loop-reduce)
+; O3-WINDOWS-NEXT: loop(canon-freeze)
+; O3-WINDOWS-NEXT: loop-mssa(loop-reduce)
; O3-WINDOWS-NEXT: mergeicmps
; O3-WINDOWS-NEXT: expand-memcmp
; O3-WINDOWS-NEXT: gc-lowering)
More information about the llvm-branch-commits
mailing list