[llvm-branch-commits] [llvm] InstCombine: Handle multiple use copysign (PR #176917)
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llvm-branch-commits at lists.llvm.org
Tue Jan 20 04:48:10 PST 2026
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-llvm-support
Author: Matt Arsenault (arsenm)
<details>
<summary>Changes</summary>
Handle multiple use copysign in SimplifyDemandedFPClass
---
Full diff: https://github.com/llvm/llvm-project/pull/176917.diff
3 Files Affected:
- (modified) llvm/include/llvm/Support/KnownFPClass.h (+7)
- (modified) llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp (+36-3)
- (modified) llvm/test/Transforms/InstCombine/simplify-demanded-fpclass.ll (+7-7)
``````````diff
diff --git a/llvm/include/llvm/Support/KnownFPClass.h b/llvm/include/llvm/Support/KnownFPClass.h
index 3dd2cbad873d2..4d0a46f6ce602 100644
--- a/llvm/include/llvm/Support/KnownFPClass.h
+++ b/llvm/include/llvm/Support/KnownFPClass.h
@@ -290,6 +290,13 @@ struct KnownFPClass {
KnownFPClasses &= (fcPositive | fcNan);
}
+ static KnownFPClass copysign(const KnownFPClass &KnownMag,
+ const KnownFPClass &KnownSign) {
+ KnownFPClass Known = KnownMag;
+ Known.copysign(KnownSign);
+ return Known;
+ }
+
// Propagate knowledge that a non-NaN source implies the result can also not
// be a NaN. For unconstrained operations, signaling nans are not guaranteed
// to be quieted but cannot be introduced.
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
index 9212cfd8fd28d..805a0ca8a9b97 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
@@ -2600,7 +2600,9 @@ Value *InstCombinerImpl::SimplifyDemandedUseFPClass(Instruction *I,
case Intrinsic::copysign: {
// Flip on more potentially demanded classes
const FPClassTest DemandedMaskAnySign = llvm::unknown_sign(DemandedMask);
- if (SimplifyDemandedFPClass(CI, 0, DemandedMaskAnySign, Known, Depth + 1))
+ KnownFPClass KnownMag;
+ if (SimplifyDemandedFPClass(CI, 0, DemandedMaskAnySign, KnownMag,
+ Depth + 1))
return I;
if ((DemandedMask & fcNegative) == DemandedMask) {
@@ -2616,7 +2618,8 @@ Value *InstCombinerImpl::SimplifyDemandedUseFPClass(Instruction *I,
}
if (Value *Simplified = simplifyDemandedFPClassCopysignMag(
- CI->getArgOperand(0), DemandedMask, Known, FMF.noSignedZeros()))
+ CI->getArgOperand(0), DemandedMask, KnownMag,
+ FMF.noSignedZeros()))
return Simplified;
KnownFPClass KnownSign = computeKnownFPClass(CI->getArgOperand(1),
@@ -2643,7 +2646,7 @@ Value *InstCombinerImpl::SimplifyDemandedUseFPClass(Instruction *I,
return I;
}
- Known.copysign(KnownSign);
+ Known = KnownFPClass::copysign(KnownMag, KnownSign);
break;
}
case Intrinsic::maximum:
@@ -3147,6 +3150,36 @@ Value *InstCombinerImpl::SimplifyMultipleUseDemandedFPClass(
return Simplified;
break;
}
+ case Intrinsic::copysign: {
+ Value *Src = CI->getArgOperand(0);
+ Value *Sign = CI->getArgOperand(1);
+ KnownFPClass KnownSrc =
+ computeKnownFPClass(Src, fcAllFlags, CxtI, Depth + 1);
+
+ // Rule out some cases by magnitude, which may help prove the sign bit is
+ // one direction or the other.
+ KnownSrc.knownNot(~llvm::unknown_sign(DemandedMask));
+
+ // Cannot use nsz in the multiple use case.
+ if (Value *Simplified = simplifyDemandedFPClassCopysignMag(
+ Src, DemandedMask, KnownSrc, /*NSZ=*/false))
+ return Simplified;
+
+ KnownFPClass KnownSign =
+ computeKnownFPClass(Sign, fcAllFlags, CxtI, Depth + 1);
+
+ if (FMF.noInfs())
+ KnownSign.knownNot(fcInf);
+ if (FMF.noNaNs())
+ KnownSign.knownNot(fcNan);
+
+ if (KnownSign.SignBit && KnownSrc.SignBit &&
+ *KnownSign.SignBit == *KnownSrc.SignBit)
+ return Src;
+
+ Known = KnownFPClass::copysign(KnownSrc, KnownSign);
+ break;
+ }
case Intrinsic::maximum:
case Intrinsic::minimum:
case Intrinsic::maximumnum:
diff --git a/llvm/test/Transforms/InstCombine/simplify-demanded-fpclass.ll b/llvm/test/Transforms/InstCombine/simplify-demanded-fpclass.ll
index 45a50f04e1b0f..683b31869e138 100644
--- a/llvm/test/Transforms/InstCombine/simplify-demanded-fpclass.ll
+++ b/llvm/test/Transforms/InstCombine/simplify-demanded-fpclass.ll
@@ -2136,7 +2136,7 @@ define nofpclass(nan ninf nnorm nsub nzero) float @ret_only_positive__copysign_s
; CHECK-SAME: (float nofpclass(nan ninf nzero nsub nnorm) [[ALWAYS_POSITIVE:%.*]], float [[UNKNOWN:%.*]], ptr [[PTR:%.*]]) {
; CHECK-NEXT: [[COPYSIGN:%.*]] = call float @llvm.copysign.f32(float [[ALWAYS_POSITIVE]], float [[UNKNOWN]])
; CHECK-NEXT: store float [[COPYSIGN]], ptr [[PTR]], align 4
-; CHECK-NEXT: ret float [[COPYSIGN]]
+; CHECK-NEXT: ret float [[ALWAYS_POSITIVE]]
;
%copysign = call float @llvm.copysign.f32(float %always.positive, float %unknown)
store float %copysign, ptr %ptr
@@ -2159,7 +2159,7 @@ define nofpclass(nan pinf pnorm psub pzero) float @ret_only_negative__copysign_s
; CHECK-SAME: (float nofpclass(nan pinf pzero psub pnorm) [[ALWAYS_NEGATIVE:%.*]], float [[UNKNOWN:%.*]], ptr [[PTR:%.*]]) {
; CHECK-NEXT: [[COPYSIGN:%.*]] = call float @llvm.copysign.f32(float [[ALWAYS_NEGATIVE]], float [[UNKNOWN]])
; CHECK-NEXT: store float [[COPYSIGN]], ptr [[PTR]], align 4
-; CHECK-NEXT: ret float [[COPYSIGN]]
+; CHECK-NEXT: ret float [[ALWAYS_NEGATIVE]]
;
%copysign = call float @llvm.copysign.f32(float %always.negative, float %unknown)
store float %copysign, ptr %ptr
@@ -2228,7 +2228,7 @@ define nofpclass(nan nnorm nsub nzero) float @ret_only_positive_or_ninf__copysig
; CHECK-SAME: (float nofpclass(nan ninf nzero nsub nnorm) [[ALWAYS_POSITIVE:%.*]], float [[UNKNOWN:%.*]], ptr [[PTR:%.*]]) {
; CHECK-NEXT: [[COPYSIGN:%.*]] = call ninf float @llvm.copysign.f32(float [[ALWAYS_POSITIVE]], float [[UNKNOWN]])
; CHECK-NEXT: store float [[COPYSIGN]], ptr [[PTR]], align 4
-; CHECK-NEXT: ret float [[COPYSIGN]]
+; CHECK-NEXT: ret float [[ALWAYS_POSITIVE]]
;
%copysign = call ninf float @llvm.copysign.f32(float %always.positive, float %unknown)
store float %copysign, ptr %ptr
@@ -2386,7 +2386,7 @@ define nofpclass(pinf pnorm psub pzero) float @ret_only_negative_or_nan__copysig
; CHECK-SAME: (float nofpclass(pinf pzero psub pnorm) [[ALWAYS_NEGATIVE_OR_NAN:%.*]], float [[UNKNOWN:%.*]], ptr [[PTR:%.*]]) {
; CHECK-NEXT: [[COPYSIGN:%.*]] = call nnan float @llvm.copysign.f32(float [[ALWAYS_NEGATIVE_OR_NAN]], float [[UNKNOWN]])
; CHECK-NEXT: store float [[COPYSIGN]], ptr [[PTR]], align 4
-; CHECK-NEXT: ret float [[COPYSIGN]]
+; CHECK-NEXT: ret float [[ALWAYS_NEGATIVE_OR_NAN]]
;
%copysign = call nnan float @llvm.copysign.f32(float %always.negative.or.nan, float %unknown)
store float %copysign, ptr %ptr
@@ -2455,7 +2455,7 @@ define nofpclass(pinf pnorm psub pzero) float @ret_only_positive_or_nan__copysig
; CHECK-SAME: (float nofpclass(pinf pzero psub pnorm) [[ALWAYS_NEGATIVE_OR_NAN:%.*]], float [[UNKNOWN:%.*]], ptr [[PTR:%.*]]) {
; CHECK-NEXT: [[COPYSIGN:%.*]] = call nnan float @llvm.copysign.f32(float [[ALWAYS_NEGATIVE_OR_NAN]], float [[UNKNOWN]])
; CHECK-NEXT: store float [[COPYSIGN]], ptr [[PTR]], align 4
-; CHECK-NEXT: ret float [[COPYSIGN]]
+; CHECK-NEXT: ret float [[ALWAYS_NEGATIVE_OR_NAN]]
;
%copysign = call nnan float @llvm.copysign.f32(float %always.negative.or.nan, float %unknown)
store float %copysign, ptr %ptr
@@ -2479,7 +2479,7 @@ define nofpclass(nan) float @ret_no_nan__copysign_ninf__src_known_negative_or_na
; CHECK-SAME: (float nofpclass(pinf pzero psub pnorm) [[ALWAYS_NEGATIVE_OR_NAN:%.*]], float nofpclass(nan pzero psub pnorm) [[ALWAYS_NEGATIVE_OR_PINF:%.*]], ptr [[PTR:%.*]]) {
; CHECK-NEXT: [[COPYSIGN:%.*]] = call ninf float @llvm.copysign.f32(float [[ALWAYS_NEGATIVE_OR_NAN]], float [[ALWAYS_NEGATIVE_OR_PINF]])
; CHECK-NEXT: store float [[COPYSIGN]], ptr [[PTR]], align 4
-; CHECK-NEXT: ret float [[COPYSIGN]]
+; CHECK-NEXT: ret float [[ALWAYS_NEGATIVE_OR_NAN]]
;
%copysign = call ninf float @llvm.copysign.f32(float %always.negative.or.nan, float %always.negative.or.pinf)
store float %copysign, ptr %ptr
@@ -2503,7 +2503,7 @@ define nofpclass(nan) float @ret_no_nan__copysign_ninf__src_known_negative_or_na
; CHECK-SAME: (float nofpclass(ninf nzero nsub nnorm) [[ALWAYS_POSITIVE_OR_NAN:%.*]], float nofpclass(nan nzero nsub nnorm) [[ALWAYS_NEGATIVE_OR_PINF:%.*]], ptr [[PTR:%.*]]) {
; CHECK-NEXT: [[COPYSIGN:%.*]] = call ninf float @llvm.copysign.f32(float [[ALWAYS_POSITIVE_OR_NAN]], float [[ALWAYS_NEGATIVE_OR_PINF]])
; CHECK-NEXT: store float [[COPYSIGN]], ptr [[PTR]], align 4
-; CHECK-NEXT: ret float [[COPYSIGN]]
+; CHECK-NEXT: ret float [[ALWAYS_POSITIVE_OR_NAN]]
;
%copysign = call ninf float @llvm.copysign.f32(float %always.positive.or.nan, float %always.negative.or.pinf)
store float %copysign, ptr %ptr
``````````
</details>
https://github.com/llvm/llvm-project/pull/176917
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