[llvm-branch-commits] [llvm] AMDGPU: Change ABI of 16-bit element vectors on gfx6/7 (PR #175781)

[Stanislav Mekhanoshin via llvm-branch-commits]

================
@@ -1113,7 +1113,7 @@ MVT SITargetLowering::getRegisterTypeForCallingConv(LLVMContext &Context,
     if (Size == 16) {
       if (Subtarget->has16BitInsts())
         return MVT::getVectorVT(ScalarVT.getSimpleVT(), 2);
-      return VT.isInteger() ? MVT::i32 : MVT::f32;
+      return ScalarVT == MVT::f32 ? MVT::f32 : MVT::i32;
----------------
rampitec wrote:

How can `ScalarVT` be `f32` if its size is 16?

https://github.com/llvm/llvm-project/pull/175781