[llvm-branch-commits] [llvm] [AMDGPU] Put back ProperlyAlignedRC helper functions (PR #175000)

[Christudasan Devadasan via llvm-branch-commits]

cdevadas wrote:

> This should not be reintroduced. Instruction constraints should be taken directly from the relevant use instructions, this is unnecessary hardcoding. Spills should not have hard alignment restrictions

Can you elaborate on it? How, during RA, can the newly introduced regclasses be constrained for their uses? Currently, there is an MIR verifier error for the spill and its subsequent uses for not meeting the alignment requirements.

https://github.com/llvm/llvm-project/pull/175000