[llvm-branch-commits] [llvm] [InlineSpiller][AMDGPU] Implement subreg reload during RA spill (PR #175002)

[Christudasan Devadasan via llvm-branch-commits]

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cdevadas wrote:

Again, this failure is no longer visible as we have sufficient registers after sub-reg reload. Tried to tweak the test, but failed to get this extreme edge case. I guess it is ok to remove the test.

https://github.com/llvm/llvm-project/pull/175002