[llvm-branch-commits] [llvm] [AArch64] Consider MOVaddr* as cheap if fuse-adrp-add (PR #121904)
Guy David via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Thu Feb 19 05:56:12 PST 2026
https://github.com/guy-david updated https://github.com/llvm/llvm-project/pull/121904
>From bdd0f4c2dd110d46ecc2255097fe6eca8292e9bf Mon Sep 17 00:00:00 2001
From: Guy David <guyda96 at gmail.com>
Date: Thu, 19 Feb 2026 12:02:25 +0200
Subject: [PATCH] [AArch64] Consider MOVaddr* as cheap if fuse-adrp-add
---
llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 9 +
llvm/lib/Target/AArch64/AArch64InstrInfo.td | 4 +
.../CodeGen/AArch64/arm64ec-indirect-call.ll | 2 +-
llvm/test/CodeGen/AArch64/atomic-ops-lse.ll | 176 +++++++++---------
llvm/test/CodeGen/AArch64/atomic-ops.ll | 16 +-
llvm/test/CodeGen/AArch64/cfguard-arm64ec.ll | 6 +-
.../CodeGen/AArch64/cgdata-outline-gvar.ll | 12 +-
.../AArch64/cheap-as-a-move-MOVaddr.ll | 55 ++++++
.../AArch64/local-bounds-single-trap.ll | 4 +-
.../CodeGen/AArch64/machine-outliner-throw.ll | 4 +-
llvm/test/CodeGen/AArch64/memcmp.ll | 18 +-
...sign-return-address-cfi-negate-ra-state.ll | 4 +-
12 files changed, 190 insertions(+), 120 deletions(-)
create mode 100644 llvm/test/CodeGen/AArch64/cheap-as-a-move-MOVaddr.ll
diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
index 6c4a778b10f3f..186e6bb5d4bed 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
@@ -1280,6 +1280,15 @@ bool AArch64InstrInfo::isAsCheapAsAMove(const MachineInstr &MI) const {
return isCheapImmediate(MI, 32);
case AArch64::MOVi64imm:
return isCheapImmediate(MI, 64);
+
+ case AArch64::MOVaddr:
+ case AArch64::MOVaddrJT:
+ case AArch64::MOVaddrCP:
+ case AArch64::MOVaddrBA:
+ case AArch64::MOVaddrTLS:
+ case AArch64::MOVaddrEXT:
+ return Subtarget.hasFuseAdrpAdd() &&
+ !(MI.getOperand(1).getTargetFlags() & AArch64II::MO_TAGGED);
}
}
diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.td b/llvm/lib/Target/AArch64/AArch64InstrInfo.td
index a70f0e2f5da0c..1a86aab048f28 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrInfo.td
+++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.td
@@ -1430,6 +1430,9 @@ def LOADgot : Pseudo<(outs GPR64common:$dst), (ins i64imm:$addr),
[(set GPR64common:$dst, (AArch64LOADgot tglobaladdr:$addr))]>,
Sched<[WriteLDAdr]>;
+// Expands to ADRP+ADD. CodeGen-only, so no real interest to handle the 12-byte
+// tagged variant.
+let Size = 8 in {
// The MOVaddr instruction should match only when the add is not folded
// into a load or store address.
def MOVaddr
@@ -1462,6 +1465,7 @@ def MOVaddrEXT
[(set GPR64common:$dst, (AArch64addlow (AArch64adrp texternalsym:$hi),
texternalsym:$low))]>,
Sched<[WriteAdrAdr]>;
+}
// Normally AArch64addlow either gets folded into a following ldr/str,
// or together with an adrp into MOVaddr above. For cases with TLS, it
// might appear without either of them, so allow lowering it into a plain
diff --git a/llvm/test/CodeGen/AArch64/arm64ec-indirect-call.ll b/llvm/test/CodeGen/AArch64/arm64ec-indirect-call.ll
index e6a42c382e4f6..cabfe785053d8 100644
--- a/llvm/test/CodeGen/AArch64/arm64ec-indirect-call.ll
+++ b/llvm/test/CodeGen/AArch64/arm64ec-indirect-call.ll
@@ -6,10 +6,10 @@ define void @simple(ptr %g) {
; CHECK-NEXT: .seh_save_reg_x x30, 16
; CHECK-NEXT: .seh_endprologue
; CHECK-NEXT: adrp x8, __os_arm64x_check_icall
+; CHECK-NEXT: mov x11, x0
; CHECK-NEXT: adrp x10, $iexit_thunk$cdecl$v$v
; CHECK-NEXT: add x10, x10, :lo12:$iexit_thunk$cdecl$v$v
; CHECK-NEXT: ldr x8, [x8, :lo12:__os_arm64x_check_icall]
-; CHECK-NEXT: mov x11, x0
; CHECK-NEXT: blr x8
; CHECK-NEXT: blr x11
; CHECK-NEXT: .seh_startepilogue
diff --git a/llvm/test/CodeGen/AArch64/atomic-ops-lse.ll b/llvm/test/CodeGen/AArch64/atomic-ops-lse.ll
index ac64495138175..9c3d8418010d3 100644
--- a/llvm/test/CodeGen/AArch64/atomic-ops-lse.ll
+++ b/llvm/test/CodeGen/AArch64/atomic-ops-lse.ll
@@ -2412,9 +2412,9 @@ define dso_local i8 @test_atomic_load_sub_i8_neg_imm() nounwind {
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i8_neg_imm:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
-; OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -2422,9 +2422,9 @@ define dso_local i8 @test_atomic_load_sub_i8_neg_imm() nounwind {
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i8_neg_imm:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
-; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd1_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
@@ -2447,9 +2447,9 @@ define dso_local i16 @test_atomic_load_sub_i16_neg_imm() nounwind {
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i16_neg_imm:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
-; OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -2457,9 +2457,9 @@ define dso_local i16 @test_atomic_load_sub_i16_neg_imm() nounwind {
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i16_neg_imm:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
-; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd2_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
@@ -2482,9 +2482,9 @@ define dso_local i32 @test_atomic_load_sub_i32_neg_imm() nounwind {
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32_neg_imm:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
-; OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -2492,9 +2492,9 @@ define dso_local i32 @test_atomic_load_sub_i32_neg_imm() nounwind {
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i32_neg_imm:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
-; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
@@ -2517,9 +2517,9 @@ define dso_local i64 @test_atomic_load_sub_i64_neg_imm() nounwind {
; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64_neg_imm:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
-; OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -2527,9 +2527,9 @@ define dso_local i64 @test_atomic_load_sub_i64_neg_imm() nounwind {
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i64_neg_imm:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
-; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldadd8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
@@ -2684,9 +2684,9 @@ define dso_local i8 @test_atomic_load_and_i8(i8 %offset) nounwind {
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i8:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
-; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr1_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -2694,9 +2694,9 @@ define dso_local i8 @test_atomic_load_and_i8(i8 %offset) nounwind {
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i8:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
-; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr1_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
@@ -2718,9 +2718,9 @@ define dso_local i16 @test_atomic_load_and_i16(i16 %offset) nounwind {
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i16:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
-; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr2_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -2728,9 +2728,9 @@ define dso_local i16 @test_atomic_load_and_i16(i16 %offset) nounwind {
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i16:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
-; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr2_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
@@ -2752,9 +2752,9 @@ define dso_local i32 @test_atomic_load_and_i32(i32 %offset) nounwind {
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
-; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -2762,9 +2762,9 @@ define dso_local i32 @test_atomic_load_and_i32(i32 %offset) nounwind {
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
-; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
@@ -2786,9 +2786,9 @@ define dso_local i64 @test_atomic_load_and_i64(i64 %offset) nounwind {
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mvn x0, x0
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
-; OUTLINE-ATOMICS-NEXT: mvn x0, x0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -2796,9 +2796,9 @@ define dso_local i64 @test_atomic_load_and_i64(i64 %offset) nounwind {
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mvn x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
-; MSVC-OUTLINE-ATOMICS-NEXT: mvn x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
@@ -2820,9 +2820,9 @@ define dso_local i8 @test_atomic_load_and_i8_inv_imm() nounwind {
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i8_inv_imm:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
-; OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr1_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -2830,9 +2830,9 @@ define dso_local i8 @test_atomic_load_and_i8_inv_imm() nounwind {
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i8_inv_imm:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
-; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr1_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
@@ -2853,9 +2853,9 @@ define dso_local i16 @test_atomic_load_and_i16_inv_imm() nounwind {
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i16_inv_imm:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
-; OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr2_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -2863,9 +2863,9 @@ define dso_local i16 @test_atomic_load_and_i16_inv_imm() nounwind {
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i16_inv_imm:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
-; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr2_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
@@ -2886,9 +2886,9 @@ define dso_local i32 @test_atomic_load_and_i32_inv_imm() nounwind {
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_inv_imm:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
-; OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -2896,9 +2896,9 @@ define dso_local i32 @test_atomic_load_and_i32_inv_imm() nounwind {
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_inv_imm:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
-; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
@@ -2919,9 +2919,9 @@ define dso_local i64 @test_atomic_load_and_i64_inv_imm() nounwind {
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_inv_imm:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
-; OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -2929,9 +2929,9 @@ define dso_local i64 @test_atomic_load_and_i64_inv_imm() nounwind {
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_inv_imm:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
-; MSVC-OUTLINE-ATOMICS-NEXT: mov w0, #1 // =0x1
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
@@ -3076,9 +3076,9 @@ define dso_local void @test_atomic_load_and_i32_noret(i32 %offset) nounwind {
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_noret:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
-; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -3086,9 +3086,9 @@ define dso_local void @test_atomic_load_and_i32_noret(i32 %offset) nounwind {
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_noret:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
-; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
@@ -3110,9 +3110,9 @@ define dso_local void @test_atomic_load_and_i64_noret(i64 %offset) nounwind {
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_noret:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mvn x0, x0
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
-; OUTLINE-ATOMICS-NEXT: mvn x0, x0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -3120,9 +3120,9 @@ define dso_local void @test_atomic_load_and_i64_noret(i64 %offset) nounwind {
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_noret:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mvn x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
-; MSVC-OUTLINE-ATOMICS-NEXT: mvn x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
@@ -4070,9 +4070,9 @@ define dso_local i8 @test_atomic_load_and_i8_acq_rel(i8 %offset) nounwind {
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i8_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
-; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr1_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -4080,9 +4080,9 @@ define dso_local i8 @test_atomic_load_and_i8_acq_rel(i8 %offset) nounwind {
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i8_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
-; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr1_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
@@ -4103,9 +4103,9 @@ define dso_local i16 @test_atomic_load_and_i16_acq_rel(i16 %offset) nounwind {
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i16_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
-; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr2_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -4113,9 +4113,9 @@ define dso_local i16 @test_atomic_load_and_i16_acq_rel(i16 %offset) nounwind {
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i16_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
-; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr2_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
@@ -4136,9 +4136,9 @@ define dso_local i32 @test_atomic_load_and_i32_acq_rel(i32 %offset) nounwind {
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
-; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -4146,9 +4146,9 @@ define dso_local i32 @test_atomic_load_and_i32_acq_rel(i32 %offset) nounwind {
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
-; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
@@ -4169,9 +4169,9 @@ define dso_local i64 @test_atomic_load_and_i64_acq_rel(i64 %offset) nounwind {
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mvn x0, x0
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
-; OUTLINE-ATOMICS-NEXT: mvn x0, x0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -4179,9 +4179,9 @@ define dso_local i64 @test_atomic_load_and_i64_acq_rel(i64 %offset) nounwind {
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mvn x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
-; MSVC-OUTLINE-ATOMICS-NEXT: mvn x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
@@ -4202,9 +4202,9 @@ define dso_local void @test_atomic_load_and_i32_noret_acq_rel(i32 %offset) nounw
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_noret_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
-; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -4212,9 +4212,9 @@ define dso_local void @test_atomic_load_and_i32_noret_acq_rel(i32 %offset) nounw
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_noret_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
-; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
@@ -4235,9 +4235,9 @@ define dso_local void @test_atomic_load_and_i64_noret_acq_rel(i64 %offset) nounw
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_noret_acq_rel:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mvn x0, x0
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
-; OUTLINE-ATOMICS-NEXT: mvn x0, x0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -4245,9 +4245,9 @@ define dso_local void @test_atomic_load_and_i64_noret_acq_rel(i64 %offset) nounw
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_noret_acq_rel:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mvn x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
-; MSVC-OUTLINE-ATOMICS-NEXT: mvn x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
@@ -4268,9 +4268,9 @@ define dso_local i8 @test_atomic_load_and_i8_acquire(i8 %offset) nounwind {
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i8_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
-; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr1_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -4278,9 +4278,9 @@ define dso_local i8 @test_atomic_load_and_i8_acquire(i8 %offset) nounwind {
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i8_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
-; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr1_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
@@ -4301,9 +4301,9 @@ define dso_local i16 @test_atomic_load_and_i16_acquire(i16 %offset) nounwind {
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i16_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
-; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr2_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -4311,9 +4311,9 @@ define dso_local i16 @test_atomic_load_and_i16_acquire(i16 %offset) nounwind {
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i16_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
-; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr2_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
@@ -4334,9 +4334,9 @@ define dso_local i32 @test_atomic_load_and_i32_acquire(i32 %offset) nounwind {
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
-; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -4344,9 +4344,9 @@ define dso_local i32 @test_atomic_load_and_i32_acquire(i32 %offset) nounwind {
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
-; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
@@ -4367,9 +4367,9 @@ define dso_local i64 @test_atomic_load_and_i64_acquire(i64 %offset) nounwind {
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mvn x0, x0
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
-; OUTLINE-ATOMICS-NEXT: mvn x0, x0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -4377,9 +4377,9 @@ define dso_local i64 @test_atomic_load_and_i64_acquire(i64 %offset) nounwind {
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mvn x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
-; MSVC-OUTLINE-ATOMICS-NEXT: mvn x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
@@ -4400,9 +4400,9 @@ define dso_local void @test_atomic_load_and_i32_noret_acquire(i32 %offset) nounw
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_noret_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
-; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -4410,9 +4410,9 @@ define dso_local void @test_atomic_load_and_i32_noret_acquire(i32 %offset) nounw
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_noret_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
-; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
@@ -4433,9 +4433,9 @@ define dso_local void @test_atomic_load_and_i64_noret_acquire(i64 %offset) nounw
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_noret_acquire:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mvn x0, x0
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
-; OUTLINE-ATOMICS-NEXT: mvn x0, x0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -4443,9 +4443,9 @@ define dso_local void @test_atomic_load_and_i64_noret_acquire(i64 %offset) nounw
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_noret_acquire:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mvn x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
-; MSVC-OUTLINE-ATOMICS-NEXT: mvn x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
@@ -4466,9 +4466,9 @@ define dso_local i8 @test_atomic_load_and_i8_monotonic(i8 %offset) nounwind {
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i8_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
-; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr1_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -4476,9 +4476,9 @@ define dso_local i8 @test_atomic_load_and_i8_monotonic(i8 %offset) nounwind {
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i8_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
-; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr1_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
@@ -4499,9 +4499,9 @@ define dso_local i16 @test_atomic_load_and_i16_monotonic(i16 %offset) nounwind {
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i16_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
-; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr2_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -4509,9 +4509,9 @@ define dso_local i16 @test_atomic_load_and_i16_monotonic(i16 %offset) nounwind {
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i16_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
-; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr2_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
@@ -4532,9 +4532,9 @@ define dso_local i32 @test_atomic_load_and_i32_monotonic(i32 %offset) nounwind {
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
-; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -4542,9 +4542,9 @@ define dso_local i32 @test_atomic_load_and_i32_monotonic(i32 %offset) nounwind {
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
-; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
@@ -4565,9 +4565,9 @@ define dso_local i64 @test_atomic_load_and_i64_monotonic(i64 %offset) nounwind {
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mvn x0, x0
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
-; OUTLINE-ATOMICS-NEXT: mvn x0, x0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -4575,9 +4575,9 @@ define dso_local i64 @test_atomic_load_and_i64_monotonic(i64 %offset) nounwind {
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mvn x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
-; MSVC-OUTLINE-ATOMICS-NEXT: mvn x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
@@ -4598,9 +4598,9 @@ define dso_local void @test_atomic_load_and_i32_noret_monotonic(i32 %offset) nou
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_noret_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
-; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -4608,9 +4608,9 @@ define dso_local void @test_atomic_load_and_i32_noret_monotonic(i32 %offset) nou
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_noret_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
-; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
@@ -4631,9 +4631,9 @@ define dso_local void @test_atomic_load_and_i64_noret_monotonic(i64 %offset) nou
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_noret_monotonic:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mvn x0, x0
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
-; OUTLINE-ATOMICS-NEXT: mvn x0, x0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_relax
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -4641,9 +4641,9 @@ define dso_local void @test_atomic_load_and_i64_noret_monotonic(i64 %offset) nou
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_noret_monotonic:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mvn x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
-; MSVC-OUTLINE-ATOMICS-NEXT: mvn x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_relax
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
@@ -4664,9 +4664,9 @@ define dso_local i8 @test_atomic_load_and_i8_release(i8 %offset) nounwind {
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i8_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
-; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr1_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -4674,9 +4674,9 @@ define dso_local i8 @test_atomic_load_and_i8_release(i8 %offset) nounwind {
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i8_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
-; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr1_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
@@ -4697,9 +4697,9 @@ define dso_local i16 @test_atomic_load_and_i16_release(i16 %offset) nounwind {
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i16_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
-; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr2_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -4707,9 +4707,9 @@ define dso_local i16 @test_atomic_load_and_i16_release(i16 %offset) nounwind {
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i16_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
-; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr2_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
@@ -4730,9 +4730,9 @@ define dso_local i32 @test_atomic_load_and_i32_release(i32 %offset) nounwind {
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
-; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -4740,9 +4740,9 @@ define dso_local i32 @test_atomic_load_and_i32_release(i32 %offset) nounwind {
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
-; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
@@ -4763,9 +4763,9 @@ define dso_local i64 @test_atomic_load_and_i64_release(i64 %offset) nounwind {
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mvn x0, x0
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
-; OUTLINE-ATOMICS-NEXT: mvn x0, x0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -4773,9 +4773,9 @@ define dso_local i64 @test_atomic_load_and_i64_release(i64 %offset) nounwind {
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mvn x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
-; MSVC-OUTLINE-ATOMICS-NEXT: mvn x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
@@ -4796,9 +4796,9 @@ define dso_local void @test_atomic_load_and_i32_noret_release(i32 %offset) nounw
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_noret_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
-; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -4806,9 +4806,9 @@ define dso_local void @test_atomic_load_and_i32_noret_release(i32 %offset) nounw
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_noret_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
-; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
@@ -4829,9 +4829,9 @@ define dso_local void @test_atomic_load_and_i64_noret_release(i64 %offset) nounw
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_noret_release:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mvn x0, x0
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
-; OUTLINE-ATOMICS-NEXT: mvn x0, x0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -4839,9 +4839,9 @@ define dso_local void @test_atomic_load_and_i64_noret_release(i64 %offset) nounw
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_noret_release:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mvn x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
-; MSVC-OUTLINE-ATOMICS-NEXT: mvn x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_rel
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC-OUTLINE-ATOMICS-NEXT: ret
@@ -4862,9 +4862,9 @@ define dso_local i8 @test_atomic_load_and_i8_seq_cst(i8 %offset) nounwind {
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i8_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var8
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
-; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr1_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -4872,9 +4872,9 @@ define dso_local i8 @test_atomic_load_and_i8_seq_cst(i8 %offset) nounwind {
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i8_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var8
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var8
-; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr1_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
@@ -4896,9 +4896,9 @@ define dso_local i16 @test_atomic_load_and_i16_seq_cst(i16 %offset) nounwind {
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i16_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var16
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
-; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr2_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -4906,9 +4906,9 @@ define dso_local i16 @test_atomic_load_and_i16_seq_cst(i16 %offset) nounwind {
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i16_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var16
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var16
-; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr2_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
@@ -4930,9 +4930,9 @@ define dso_local i32 @test_atomic_load_and_i32_seq_cst(i32 %offset) nounwind {
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
-; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -4940,9 +4940,9 @@ define dso_local i32 @test_atomic_load_and_i32_seq_cst(i32 %offset) nounwind {
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
-; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
@@ -4964,9 +4964,9 @@ define dso_local i64 @test_atomic_load_and_i64_seq_cst(i64 %offset) nounwind {
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mvn x0, x0
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
-; OUTLINE-ATOMICS-NEXT: mvn x0, x0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -4974,9 +4974,9 @@ define dso_local i64 @test_atomic_load_and_i64_seq_cst(i64 %offset) nounwind {
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mvn x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
-; MSVC-OUTLINE-ATOMICS-NEXT: mvn x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
@@ -4998,9 +4998,9 @@ define dso_local void @test_atomic_load_and_i32_noret_seq_cst(i32 %offset) nounw
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_noret_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: adrp x1, var32
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
-; OUTLINE-ATOMICS-NEXT: mvn w0, w0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -5008,9 +5008,9 @@ define dso_local void @test_atomic_load_and_i32_noret_seq_cst(i32 %offset) nounw
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i32_noret_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var32
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var32
-; MSVC-OUTLINE-ATOMICS-NEXT: mvn w0, w0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr4_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
@@ -5032,9 +5032,9 @@ define dso_local void @test_atomic_load_and_i64_noret_seq_cst(i64 %offset) nounw
; OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_noret_seq_cst:
; OUTLINE-ATOMICS: // %bb.0:
; OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT: mvn x0, x0
; OUTLINE-ATOMICS-NEXT: adrp x1, var64
; OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
-; OUTLINE-ATOMICS-NEXT: mvn x0, x0
; OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq_rel
; OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE-ATOMICS-NEXT: ret
@@ -5042,9 +5042,9 @@ define dso_local void @test_atomic_load_and_i64_noret_seq_cst(i64 %offset) nounw
; MSVC-OUTLINE-ATOMICS-LABEL: test_atomic_load_and_i64_noret_seq_cst:
; MSVC-OUTLINE-ATOMICS: // %bb.0:
; MSVC-OUTLINE-ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC-OUTLINE-ATOMICS-NEXT: mvn x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: adrp x1, var64
; MSVC-OUTLINE-ATOMICS-NEXT: add x1, x1, :lo12:var64
-; MSVC-OUTLINE-ATOMICS-NEXT: mvn x0, x0
; MSVC-OUTLINE-ATOMICS-NEXT: bl __aarch64_ldclr8_acq_rel
; MSVC-OUTLINE-ATOMICS-NEXT: dmb ish
; MSVC-OUTLINE-ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
diff --git a/llvm/test/CodeGen/AArch64/atomic-ops.ll b/llvm/test/CodeGen/AArch64/atomic-ops.ll
index 5adda9aaaaf90..f8fd0bd399406 100644
--- a/llvm/test/CodeGen/AArch64/atomic-ops.ll
+++ b/llvm/test/CodeGen/AArch64/atomic-ops.ll
@@ -514,9 +514,9 @@ define dso_local i8 @test_atomic_load_and_i8(i8 %offset) nounwind {
; OUTLINE_ATOMICS-LABEL: test_atomic_load_and_i8:
; OUTLINE_ATOMICS: // %bb.0:
; OUTLINE_ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE_ATOMICS-NEXT: mvn w0, w0
; OUTLINE_ATOMICS-NEXT: adrp x1, var8
; OUTLINE_ATOMICS-NEXT: add x1, x1, :lo12:var8
-; OUTLINE_ATOMICS-NEXT: mvn w0, w0
; OUTLINE_ATOMICS-NEXT: bl __aarch64_ldclr1_rel
; OUTLINE_ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE_ATOMICS-NEXT: ret
@@ -524,9 +524,9 @@ define dso_local i8 @test_atomic_load_and_i8(i8 %offset) nounwind {
; MSVC_OUTLINE_ATOMICS-LABEL: test_atomic_load_and_i8:
; MSVC_OUTLINE_ATOMICS: // %bb.0:
; MSVC_OUTLINE_ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC_OUTLINE_ATOMICS-NEXT: mvn w0, w0
; MSVC_OUTLINE_ATOMICS-NEXT: adrp x1, var8
; MSVC_OUTLINE_ATOMICS-NEXT: add x1, x1, :lo12:var8
-; MSVC_OUTLINE_ATOMICS-NEXT: mvn w0, w0
; MSVC_OUTLINE_ATOMICS-NEXT: bl __aarch64_ldclr1_rel
; MSVC_OUTLINE_ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC_OUTLINE_ATOMICS-NEXT: ret
@@ -574,9 +574,9 @@ define dso_local i16 @test_atomic_load_and_i16(i16 %offset) nounwind {
; OUTLINE_ATOMICS-LABEL: test_atomic_load_and_i16:
; OUTLINE_ATOMICS: // %bb.0:
; OUTLINE_ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE_ATOMICS-NEXT: mvn w0, w0
; OUTLINE_ATOMICS-NEXT: adrp x1, var16
; OUTLINE_ATOMICS-NEXT: add x1, x1, :lo12:var16
-; OUTLINE_ATOMICS-NEXT: mvn w0, w0
; OUTLINE_ATOMICS-NEXT: bl __aarch64_ldclr2_relax
; OUTLINE_ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE_ATOMICS-NEXT: ret
@@ -584,9 +584,9 @@ define dso_local i16 @test_atomic_load_and_i16(i16 %offset) nounwind {
; MSVC_OUTLINE_ATOMICS-LABEL: test_atomic_load_and_i16:
; MSVC_OUTLINE_ATOMICS: // %bb.0:
; MSVC_OUTLINE_ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC_OUTLINE_ATOMICS-NEXT: mvn w0, w0
; MSVC_OUTLINE_ATOMICS-NEXT: adrp x1, var16
; MSVC_OUTLINE_ATOMICS-NEXT: add x1, x1, :lo12:var16
-; MSVC_OUTLINE_ATOMICS-NEXT: mvn w0, w0
; MSVC_OUTLINE_ATOMICS-NEXT: bl __aarch64_ldclr2_relax
; MSVC_OUTLINE_ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC_OUTLINE_ATOMICS-NEXT: ret
@@ -635,9 +635,9 @@ define dso_local i32 @test_atomic_load_and_i32(i32 %offset) nounwind {
; OUTLINE_ATOMICS-LABEL: test_atomic_load_and_i32:
; OUTLINE_ATOMICS: // %bb.0:
; OUTLINE_ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE_ATOMICS-NEXT: mvn w0, w0
; OUTLINE_ATOMICS-NEXT: adrp x1, var32
; OUTLINE_ATOMICS-NEXT: add x1, x1, :lo12:var32
-; OUTLINE_ATOMICS-NEXT: mvn w0, w0
; OUTLINE_ATOMICS-NEXT: bl __aarch64_ldclr4_acq_rel
; OUTLINE_ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE_ATOMICS-NEXT: ret
@@ -645,9 +645,9 @@ define dso_local i32 @test_atomic_load_and_i32(i32 %offset) nounwind {
; MSVC_OUTLINE_ATOMICS-LABEL: test_atomic_load_and_i32:
; MSVC_OUTLINE_ATOMICS: // %bb.0:
; MSVC_OUTLINE_ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC_OUTLINE_ATOMICS-NEXT: mvn w0, w0
; MSVC_OUTLINE_ATOMICS-NEXT: adrp x1, var32
; MSVC_OUTLINE_ATOMICS-NEXT: add x1, x1, :lo12:var32
-; MSVC_OUTLINE_ATOMICS-NEXT: mvn w0, w0
; MSVC_OUTLINE_ATOMICS-NEXT: bl __aarch64_ldclr4_acq_rel
; MSVC_OUTLINE_ATOMICS-NEXT: dmb ish
; MSVC_OUTLINE_ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
@@ -696,9 +696,9 @@ define dso_local i64 @test_atomic_load_and_i64(i64 %offset) nounwind {
; OUTLINE_ATOMICS-LABEL: test_atomic_load_and_i64:
; OUTLINE_ATOMICS: // %bb.0:
; OUTLINE_ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE_ATOMICS-NEXT: mvn x0, x0
; OUTLINE_ATOMICS-NEXT: adrp x1, var64
; OUTLINE_ATOMICS-NEXT: add x1, x1, :lo12:var64
-; OUTLINE_ATOMICS-NEXT: mvn x0, x0
; OUTLINE_ATOMICS-NEXT: bl __aarch64_ldclr8_acq
; OUTLINE_ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; OUTLINE_ATOMICS-NEXT: ret
@@ -706,9 +706,9 @@ define dso_local i64 @test_atomic_load_and_i64(i64 %offset) nounwind {
; MSVC_OUTLINE_ATOMICS-LABEL: test_atomic_load_and_i64:
; MSVC_OUTLINE_ATOMICS: // %bb.0:
; MSVC_OUTLINE_ATOMICS-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; MSVC_OUTLINE_ATOMICS-NEXT: mvn x0, x0
; MSVC_OUTLINE_ATOMICS-NEXT: adrp x1, var64
; MSVC_OUTLINE_ATOMICS-NEXT: add x1, x1, :lo12:var64
-; MSVC_OUTLINE_ATOMICS-NEXT: mvn x0, x0
; MSVC_OUTLINE_ATOMICS-NEXT: bl __aarch64_ldclr8_acq
; MSVC_OUTLINE_ATOMICS-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; MSVC_OUTLINE_ATOMICS-NEXT: ret
diff --git a/llvm/test/CodeGen/AArch64/cfguard-arm64ec.ll b/llvm/test/CodeGen/AArch64/cfguard-arm64ec.ll
index 75e7ac902274d..de2a330b7f0b4 100644
--- a/llvm/test/CodeGen/AArch64/cfguard-arm64ec.ll
+++ b/llvm/test/CodeGen/AArch64/cfguard-arm64ec.ll
@@ -7,12 +7,12 @@ define void @f(ptr %dst, ptr readonly %f) {
; CHECK: bl "#called"
store ptr @escaped, ptr %dst
call void %f()
-; CHECK: adrp x10, $iexit_thunk$cdecl$v$v
-; CHECK-NEXT: add x10, x10, :lo12:$iexit_thunk$cdecl$v$v
+; CHECK: mov x11,
; CHECK-NEXT: str x8, [x20]
; CHECK-NEXT: adrp x8, __os_arm64x_check_icall_cfg
+; CHECK-NEXT: adrp x10, $iexit_thunk$cdecl$v$v
+; CHECK-NEXT: add x10, x10, :lo12:$iexit_thunk$cdecl$v$v
; CHECK-NEXT: ldr x8, [x8, :lo12:__os_arm64x_check_icall_cfg]
-; CHECK-NEXT: mov x11,
; CHECK-NEXT: blr x8
; CHECK-NEXT: blr x11
ret void
diff --git a/llvm/test/CodeGen/AArch64/cgdata-outline-gvar.ll b/llvm/test/CodeGen/AArch64/cgdata-outline-gvar.ll
index 63ba1d491f9c7..57175a3d648e2 100644
--- a/llvm/test/CodeGen/AArch64/cgdata-outline-gvar.ll
+++ b/llvm/test/CodeGen/AArch64/cgdata-outline-gvar.ll
@@ -9,11 +9,11 @@
; RUN: %t/local-two.ll -o - | FileCheck %s --check-prefix=WRITE
; WRITE-LABEL: _OUTLINED_FUNCTION_{{.*}}:
-; WRITE: adrp x1, l_.str.3
-; WRITE-NEXT: add x1, x1, l_.str.3
-; WRITE-NEXT: mov w2
+; WRITE: mov w2
; WRITE-NEXT: mov w3
; WRITE-NEXT: mov w4
+; WRITE-NEXT: adrp x1, l_.str.3
+; WRITE-NEXT: add x1, x1, l_.str.3
; WRITE-NEXT: b
; Create an object file and merge it into the cgdata.
@@ -28,11 +28,11 @@
; RUN: %t/local-one.ll -o - | FileCheck %s --check-prefix=READ
; READ-LABEL: _OUTLINED_FUNCTION_{{.*}}:
-; READ: adrp x1, l_.str.5
-; READ-NEXT: add x1, x1, l_.str.5
-; READ-NEXT: mov w2
+; READ: mov w2
; READ-NEXT: mov w3
; READ-NEXT: mov w4
+; READ-NEXT: adrp x1, l_.str.5
+; READ-NEXT: add x1, x1, l_.str.5
; READ-NEXT: b
;--- local-two.ll
diff --git a/llvm/test/CodeGen/AArch64/cheap-as-a-move-MOVaddr.ll b/llvm/test/CodeGen/AArch64/cheap-as-a-move-MOVaddr.ll
new file mode 100644
index 0000000000000..bc977114e4ea3
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/cheap-as-a-move-MOVaddr.ll
@@ -0,0 +1,55 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc -mtriple=aarch64 -mattr=+fuse-adrp-add < %s | FileCheck %s --check-prefixes=CHECK,FUSE
+; RUN: llc -mtriple=aarch64 -mattr=-fuse-adrp-add < %s | FileCheck %s --check-prefixes=CHECK,NO-FUSE
+
+ at str = private constant [1 x i8] c"\00"
+
+declare void @clobber_regs()
+
+define ptr @test_movaddr_cheap_rematerialization() {
+; FUSE-LABEL: test_movaddr_cheap_rematerialization:
+; FUSE: // %bb.0:
+; FUSE-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; FUSE-NEXT: .cfi_def_cfa_offset 16
+; FUSE-NEXT: .cfi_offset w30, -16
+; FUSE-NEXT: bl clobber_regs
+; FUSE-NEXT: adrp x0, .Lstr
+; FUSE-NEXT: add x0, x0, :lo12:.Lstr
+; FUSE-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
+; FUSE-NEXT: ret
+;
+; NO-FUSE-LABEL: test_movaddr_cheap_rematerialization:
+; NO-FUSE: // %bb.0:
+; NO-FUSE-NEXT: stp x30, x19, [sp, #-16]! // 16-byte Folded Spill
+; NO-FUSE-NEXT: .cfi_def_cfa_offset 16
+; NO-FUSE-NEXT: .cfi_offset w19, -8
+; NO-FUSE-NEXT: .cfi_offset w30, -16
+; NO-FUSE-NEXT: adrp x19, .Lstr
+; NO-FUSE-NEXT: add x19, x19, :lo12:.Lstr
+; NO-FUSE-NEXT: bl clobber_regs
+; NO-FUSE-NEXT: mov x0, x19
+; NO-FUSE-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload
+; NO-FUSE-NEXT: ret
+ %p = getelementptr [10 x i8], ptr @str, i64 0, i64 0
+ call void @clobber_regs()
+ ret ptr %p
+}
+
+define ptr @test_movaddr_not_cheap_with_tagged() "target-features"="+tagged-globals" {
+; CHECK-LABEL: test_movaddr_not_cheap_with_tagged:
+; CHECK: // %bb.0:
+; CHECK-NEXT: stp x30, x19, [sp, #-16]! // 16-byte Folded Spill
+; CHECK-NEXT: .cfi_def_cfa_offset 16
+; CHECK-NEXT: .cfi_offset w19, -8
+; CHECK-NEXT: .cfi_offset w30, -16
+; CHECK-NEXT: adrp x19, :pg_hi21_nc:.Lstr
+; CHECK-NEXT: movk x19, #:prel_g3:.Lstr+4294967296
+; CHECK-NEXT: add x19, x19, :lo12:.Lstr
+; CHECK-NEXT: bl clobber_regs
+; CHECK-NEXT: mov x0, x19
+; CHECK-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload
+; CHECK-NEXT: ret
+ %p = getelementptr [10 x i8], ptr @str, i64 0, i64 0
+ call void @clobber_regs()
+ ret ptr %p
+}
diff --git a/llvm/test/CodeGen/AArch64/local-bounds-single-trap.ll b/llvm/test/CodeGen/AArch64/local-bounds-single-trap.ll
index 1207eaa2612a3..16ea53ef62f83 100644
--- a/llvm/test/CodeGen/AArch64/local-bounds-single-trap.ll
+++ b/llvm/test/CodeGen/AArch64/local-bounds-single-trap.ll
@@ -36,7 +36,9 @@ define dso_local void @f8(i32 noundef %i, i32 noundef %k) #0 {
; CHECK-ASM-NEXT: sub x8, x8, x9
; CHECK-ASM-NEXT: cbz x8, .LBB0_6
; CHECK-ASM-NEXT: // %bb.4:
-; CHECK-ASM-NEXT: add x8, x10, x9
+; CHECK-ASM-NEXT: adrp x8, .L_MergedGlobals
+; CHECK-ASM-NEXT: add x8, x8, :lo12:.L_MergedGlobals
+; CHECK-ASM-NEXT: add x8, x8, x9
; CHECK-ASM-NEXT: strb wzr, [x8, #10]
; CHECK-ASM-NEXT: add sp, sp, #16
; CHECK-ASM-NEXT: .cfi_def_cfa_offset 0
diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-throw.ll b/llvm/test/CodeGen/AArch64/machine-outliner-throw.ll
index 3b7285ef8ff42..7017cf862741f 100644
--- a/llvm/test/CodeGen/AArch64/machine-outliner-throw.ll
+++ b/llvm/test/CodeGen/AArch64/machine-outliner-throw.ll
@@ -52,9 +52,9 @@ entry:
; CHECK-LABEL: OUTLINED_FUNCTION_0:
; CHECK: .cfi_startproc
-; CHECK: adrp x1, _ZTIi
+; CHECK: mov x2, xzr
+; CHECK-NEXT: adrp x1, _ZTIi
; CHECK-NEXT: add x1, x1, :lo12:_ZTIi
-; CHECK-NEXT: mov x2, xzr
; CHECK-NEXT: str w19, [x0]
; CHECK-NEXT: b __cxa_throw
; CHECK: .cfi_endproc
diff --git a/llvm/test/CodeGen/AArch64/memcmp.ll b/llvm/test/CodeGen/AArch64/memcmp.ll
index 98ea86b06d6c5..c8f109cb40e7b 100644
--- a/llvm/test/CodeGen/AArch64/memcmp.ll
+++ b/llvm/test/CodeGen/AArch64/memcmp.ll
@@ -2434,9 +2434,9 @@ define i1 @length96_eq_const(ptr %X) nounwind {
; CHECK-LABEL: length96_eq_const:
; CHECK: // %bb.0:
; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; CHECK-NEXT: mov w2, #96 // =0x60
; CHECK-NEXT: adrp x1, .L.str
; CHECK-NEXT: add x1, x1, :lo12:.L.str
-; CHECK-NEXT: mov w2, #96 // =0x60
; CHECK-NEXT: bl memcmp
; CHECK-NEXT: cmp w0, #0
; CHECK-NEXT: cset w0, eq
@@ -2504,9 +2504,9 @@ define i1 @length127_eq_const(ptr %X) nounwind {
; CHECK-LABEL: length127_eq_const:
; CHECK: // %bb.0:
; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; CHECK-NEXT: mov w2, #127 // =0x7f
; CHECK-NEXT: adrp x1, .L.str
; CHECK-NEXT: add x1, x1, :lo12:.L.str
-; CHECK-NEXT: mov w2, #127 // =0x7f
; CHECK-NEXT: bl memcmp
; CHECK-NEXT: cmp w0, #0
; CHECK-NEXT: cset w0, eq
@@ -2574,9 +2574,9 @@ define i1 @length128_eq_const(ptr %X) nounwind {
; CHECK-LABEL: length128_eq_const:
; CHECK: // %bb.0:
; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; CHECK-NEXT: mov w2, #128 // =0x80
; CHECK-NEXT: adrp x1, .L.str
; CHECK-NEXT: add x1, x1, :lo12:.L.str
-; CHECK-NEXT: mov w2, #128 // =0x80
; CHECK-NEXT: bl memcmp
; CHECK-NEXT: cmp w0, #0
; CHECK-NEXT: cset w0, eq
@@ -2644,9 +2644,9 @@ define i1 @length192_eq_const(ptr %X) nounwind {
; CHECK-LABEL: length192_eq_const:
; CHECK: // %bb.0:
; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; CHECK-NEXT: mov w2, #192 // =0xc0
; CHECK-NEXT: adrp x1, .L.str
; CHECK-NEXT: add x1, x1, :lo12:.L.str
-; CHECK-NEXT: mov w2, #192 // =0xc0
; CHECK-NEXT: bl memcmp
; CHECK-NEXT: cmp w0, #0
; CHECK-NEXT: cset w0, eq
@@ -2714,9 +2714,9 @@ define i1 @length255_eq_const(ptr %X) nounwind {
; CHECK-LABEL: length255_eq_const:
; CHECK: // %bb.0:
; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; CHECK-NEXT: mov w2, #255 // =0xff
; CHECK-NEXT: adrp x1, .L.str
; CHECK-NEXT: add x1, x1, :lo12:.L.str
-; CHECK-NEXT: mov w2, #255 // =0xff
; CHECK-NEXT: bl memcmp
; CHECK-NEXT: cmp w0, #0
; CHECK-NEXT: cset w0, eq
@@ -2784,9 +2784,9 @@ define i1 @length256_eq_const(ptr %X) nounwind {
; CHECK-LABEL: length256_eq_const:
; CHECK: // %bb.0:
; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; CHECK-NEXT: mov w2, #256 // =0x100
; CHECK-NEXT: adrp x1, .L.str
; CHECK-NEXT: add x1, x1, :lo12:.L.str
-; CHECK-NEXT: mov w2, #256 // =0x100
; CHECK-NEXT: bl memcmp
; CHECK-NEXT: cmp w0, #0
; CHECK-NEXT: cset w0, eq
@@ -2854,9 +2854,9 @@ define i1 @length384_eq_const(ptr %X) nounwind {
; CHECK-LABEL: length384_eq_const:
; CHECK: // %bb.0:
; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; CHECK-NEXT: mov w2, #384 // =0x180
; CHECK-NEXT: adrp x1, .L.str
; CHECK-NEXT: add x1, x1, :lo12:.L.str
-; CHECK-NEXT: mov w2, #384 // =0x180
; CHECK-NEXT: bl memcmp
; CHECK-NEXT: cmp w0, #0
; CHECK-NEXT: cset w0, eq
@@ -2924,9 +2924,9 @@ define i1 @length511_eq_const(ptr %X) nounwind {
; CHECK-LABEL: length511_eq_const:
; CHECK: // %bb.0:
; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; CHECK-NEXT: mov w2, #511 // =0x1ff
; CHECK-NEXT: adrp x1, .L.str
; CHECK-NEXT: add x1, x1, :lo12:.L.str
-; CHECK-NEXT: mov w2, #511 // =0x1ff
; CHECK-NEXT: bl memcmp
; CHECK-NEXT: cmp w0, #0
; CHECK-NEXT: cset w0, eq
@@ -2994,9 +2994,9 @@ define i1 @length512_eq_const(ptr %X) nounwind {
; CHECK-LABEL: length512_eq_const:
; CHECK: // %bb.0:
; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; CHECK-NEXT: mov w2, #512 // =0x200
; CHECK-NEXT: adrp x1, .L.str
; CHECK-NEXT: add x1, x1, :lo12:.L.str
-; CHECK-NEXT: mov w2, #512 // =0x200
; CHECK-NEXT: bl memcmp
; CHECK-NEXT: cmp w0, #0
; CHECK-NEXT: cset w0, eq
diff --git a/llvm/test/CodeGen/AArch64/sign-return-address-cfi-negate-ra-state.ll b/llvm/test/CodeGen/AArch64/sign-return-address-cfi-negate-ra-state.ll
index bf70bf30534ec..3b2d039a46254 100644
--- a/llvm/test/CodeGen/AArch64/sign-return-address-cfi-negate-ra-state.ll
+++ b/llvm/test/CodeGen/AArch64/sign-return-address-cfi-negate-ra-state.ll
@@ -19,9 +19,9 @@ define dso_local i32 @_Z3fooi(i32 %x) #0 {
; CHECK-V8A-NEXT: bl __cxa_allocate_exception
; CHECK-V8A-NEXT: adrp x8, .L.str
; CHECK-V8A-NEXT: add x8, x8, :lo12:.L.str
+; CHECK-V8A-NEXT: mov x2, xzr
; CHECK-V8A-NEXT: adrp x1, _ZTIPKc
; CHECK-V8A-NEXT: add x1, x1, :lo12:_ZTIPKc
-; CHECK-V8A-NEXT: mov x2, xzr
; CHECK-V8A-NEXT: str x8, [x0]
; CHECK-V8A-NEXT: bl __cxa_throw
;
@@ -37,9 +37,9 @@ define dso_local i32 @_Z3fooi(i32 %x) #0 {
; CHECK-V83A-NEXT: bl __cxa_allocate_exception
; CHECK-V83A-NEXT: adrp x8, .L.str
; CHECK-V83A-NEXT: add x8, x8, :lo12:.L.str
+; CHECK-V83A-NEXT: mov x2, xzr
; CHECK-V83A-NEXT: adrp x1, _ZTIPKc
; CHECK-V83A-NEXT: add x1, x1, :lo12:_ZTIPKc
-; CHECK-V83A-NEXT: mov x2, xzr
; CHECK-V83A-NEXT: str x8, [x0]
; CHECK-V83A-NEXT: bl __cxa_throw
entry:
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