[llvm-branch-commits] [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)

[via llvm-branch-commits]

================
@@ -857,7 +857,28 @@ struct TLBI : SysAliasOptionalReg {
 
 namespace AArch64TLBIP {
 struct TLBIP : SysAliasOptionalReg {
-  using SysAliasOptionalReg::SysAliasOptionalReg;
+  bool AllowTLBID = false;
+
+  constexpr TLBIP(const char *N, uint16_t E, bool R, bool O, bool A,
+                  FeatureBitset F)
+      : SysAliasOptionalReg(N, E, R, O, F), AllowTLBID(A) {}
+  constexpr TLBIP(const char *N, uint16_t E, bool R, bool O, bool A)
+      : SysAliasOptionalReg(N, E, R, O), AllowTLBID(A) {}
+
+  bool allowTLBID() const { return AllowTLBID; }
+
+  bool haveFeatures(FeatureBitset ActiveFeatures) const {
+    if (ActiveFeatures[llvm::AArch64::FeatureAll])
+      return true;
+
+    FeatureBitset Required = FeaturesRequired;
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Lukacma wrote:

I think this whole logic can be simplified into smth like this:

```
return ((FeaturesRequired & ActiveFeatures) == FeaturesRequired) && (ActiveFeatures[llvm::AArch64::FeatureD128] || (ActiveFeatures[llvm::AArch64::FeatureTLBID] && allowTLBID))
```
Maybe with some comments to explain the logic and nicer formatting

https://github.com/llvm/llvm-project/pull/178913