[llvm-branch-commits] [llvm] AMDGPU: Codegen for v_dual_dot2acc_f32_f16/bf16 from VOP3 (PR #179226)

[Mirko Brkušanin via llvm-branch-commits]

================
@@ -608,12 +610,41 @@ def DOT2_BF16_Profile
 let SubtargetPredicate = HasDot12Insts  in {
 
 defm V_DOT2_F32_BF16 : VOP3PInstDotWithDual<"v_dot2_f32_bf16", DOT2_BF16_Profile,
-  int_amdgcn_fdot2_f32_bf16>;
+  int_amdgcn_fdot2_f32_bf16, 0xD, "v_dot2acc_f32_bf16">;
 
 } // End SubtargetPredicate = HasDot12Insts
 
 } // End let IsDOT = 1
 
+let IsDOT = 1, OtherPredicates = [HasOnlyDualDot2AccF32F16] in
+def V_DOT2ACC_F32_F16_PSEUDO : VOP3P_Pseudo<"", VOP3P_Profile<VOP_F32_V2F16_V2F16_F32, VOP3_REGULAR>> {
+  let Constraints = "$vdst = $src2";
+}
+
+let SubtargetPredicate = HasOnlyDualDot2AccF32F16 in
+def : GCNPat<
+  (f32 (AMDGPUfdot2 (v2f16 (VOP3PNoModsDOT v2f16:$src0)),
+                    (v2f16 (VOP3PNoModsDOT v2f16:$src1)),
+                    (f32 (VOP3PNoModsF32 f32:$src2)),
+                    (i1 DSTCLAMP.NONE))),
+  (f32 (V_DOT2ACC_F32_F16_PSEUDO (i32 8), $src0, (i32 8), $src1, (i32 8), $src2))
----------------
mbrkusanin wrote:

```suggestion
  (f32 (V_DOT2ACC_F32_F16_PSEUDO (i32 SRCMODS.OP_SEL_1), $src0,
                                 (i32 SRCMODS.OP_SEL_1), $src1,
                                 (i32 SRCMODS.OP_SEL_1), $src2))
```

https://github.com/llvm/llvm-project/pull/179226