[llvm-branch-commits] [llvm] AMDGPU: Codegen for v_dual_dot2acc_f32_f16/bf16 from VOP3 (PR #179226)

[Mirko Brkušanin via llvm-branch-commits]

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@@ -559,6 +559,19 @@ class SIInstrInfo final : public AMDGPUGenInstrInfo {
 
   static bool isVOP3(const MachineInstr &MI) { return isVOP3(MI.getDesc()); }
 
+  static bool isVOP3WithoutVOPD(const MachineInstr &MI) {
+    if (MI.getOpcode() == AMDGPU::V_DOT2_F32_F16 ||
+        MI.getOpcode() == AMDGPU::V_DOT2_F32_BF16) {
+      // VOPD if no src_mods, no clamp, no inline const and src2 same as dst.
+      return MI.getOperand(1).getImm() != 8 || !MI.getOperand(2).isReg() ||
+             MI.getOperand(3).getImm() != 8 || !MI.getOperand(4).isReg() ||
+             MI.getOperand(5).getImm() != 8 || !MI.getOperand(6).isReg() ||
+             MI.getOperand(6).getReg() != MI.getOperand(0).getReg() ||
+             MI.getOperand(7).getImm() != 0;
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mbrkusanin wrote:

Use SISrcMods::OP_SEL_1 for modifier values.


https://github.com/llvm/llvm-project/pull/179226