[llvm-branch-commits] [llvm] [AMDGPU] Fix instruction size for 64-bit literal constant operands (PR #180387)
Jay Foad via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Mon Feb 9 03:40:41 PST 2026
================
@@ -30,11 +30,19 @@ machineFunctionInfo:
body: |
; CHECK-LABEL: name: s_mov_b64_64bit_literal_size
; CHECK: bb.0:
- ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
+ ; CHECK-NEXT: successors: %bb.3(0x40000000), %bb.1(0x40000000)
; CHECK-NEXT: liveins: $sgpr8
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: S_CMP_EQ_U32 $sgpr8, 0, implicit-def $scc
- ; CHECK-NEXT: S_CBRANCH_SCC0 %bb.2, implicit $scc
+ ; CHECK-NEXT: S_CBRANCH_SCC1 %bb.1, implicit $scc
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.3:
+ ; CHECK-NEXT: successors: %bb.2(0x80000000)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: $sgpr4_sgpr5 = S_GETPC_B64 post-instr-symbol <mcsymbol >
+ ; CHECK-NEXT: $sgpr4 = S_ADD_U32 $sgpr4, target-flags(<unknown target flag>) <mcsymbol >, implicit-def $scc
+ ; CHECK-NEXT: $sgpr5 = S_ADDC_U32 $sgpr5, target-flags(<unknown target flag>) <mcsymbol >, implicit-def $scc, implicit $scc
+ ; CHECK-NEXT: S_SETPC_B64 $sgpr4_sgpr5
----------------
jayfoad wrote:
Unrelated, but this sequence could be cut down to just S_MOV_B64 (with a 64-bit literal with an absolute reloc) followed by S_SETPC_B64.
https://github.com/llvm/llvm-project/pull/180387
More information about the llvm-branch-commits
mailing list